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Sun, 21 Dec 2025 07:01:39 -0800 From: Shani Peretz To: Vamsi Attunuru CC: dpdk stable Subject: patch 'net/octeon_ep: fix device start' has been queued to stable release 23.11.6 Date: Sun, 21 Dec 2025 16:56:31 +0200 Message-ID: <20251221145746.763179-43-shperetz@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251221145746.763179-1-shperetz@nvidia.com> References: <20251221145746.763179-1-shperetz@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00022575:EE_|IA1PR12MB6068:EE_ X-MS-Office365-Filtering-Correlation-Id: d883f98d-580f-43f5-6f65-08de40a1e299 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|1800799024|36860700013|376014|13003099007|7053199007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?lP3LVzoZtEYmzNci+AUbbhZ62q2FlEuj0hoRxXT8iGqGF/7kq6WdaOhhDgX8?= =?us-ascii?Q?aOUd63BpDx0+tefTrdXtP1xNSpB4Loxg19DiAJijoVOw1ZOpXp0xx04WV3Al?= =?us-ascii?Q?AiNjrrx1qVBgKug6U7V09bf79K4Na4Gkg+Q5XlrICPGtqU33wveMk0OPk6h9?= =?us-ascii?Q?Z61TApiH2sXA6du/YxGhl8wMqAK5cOHhTxss8fLgIA+9vpB65UrKdZug6UDc?= =?us-ascii?Q?mo/clYVk4AaAbzWPJ7Y5EXKkgE/C+LUcUZRe7ONgh5jdkjkPKtWrWeXp6JAX?= =?us-ascii?Q?UvT7TFNt0IgE4zMe0sHqXaseO67jvjU5bF2VCeLox8O2bwiA9igZPUipuSm2?= =?us-ascii?Q?ICxJrnB+vWFKZI6JMzenUf1GPPMDxRvyJvoC3xoGW9irvWjFAaqOoDRA5wW0?= =?us-ascii?Q?GQZuS1FYbYBeKnxXROP0KGfBauyWpI9BKCaz75r3GFhyPeh8h7WLZv5RAFfL?= =?us-ascii?Q?SlQUNRM2DFExd7W6IzWQn3dboc617G3Fo4zHy4EY/W4NbEuDqQQR1baqC5BB?= =?us-ascii?Q?pxWQ+Wpb0qrJpyYvm3oXOGz9Qrd4f1isLrKzzdLjx/7lXsaLCqCT5+2SIWWa?= =?us-ascii?Q?rKvzVpwq/JJhWn6G/ChFpaRcidANWzBwD3hU9zyad3Sf1sdJz4yi7LcOBKc5?= =?us-ascii?Q?DQbliwnQwmzBHETX723xyMsoRhM/IOD5qNbaI2Yb9Smas8P8auxjhTNMhdee?= =?us-ascii?Q?3aKz4fwo/bP2D0SRc9gHTlP4Xuiw61BF8znOWmMPQutNmWro6KyIvYi7I7tT?= =?us-ascii?Q?cvUU8/naXwwLMRAx8Mq3qKALM7HAd/ZBls/dCWb8FtFVJIujeo9kG9QcJfc5?= =?us-ascii?Q?HqqZF+ug1DpCy4k6DLnrQ3ObagsaIchAkS1zTh7l13zGDxrBPy1RGT3j1UjX?= =?us-ascii?Q?ulwW3NxGc/W5nlXSoXYkfVX4K8/wcQGly4mw9E4rAnOMJVY0JMVndRFzMHFb?= =?us-ascii?Q?ijrloxfxtrpi7O9wIEesJIwAgVlbO0pJR+QASKbRR7qv/aJu6Ts2vkGSG8Ts?= =?us-ascii?Q?AdWFxo5d4b+fAeRJgpQq5NOXhO6Y/f05adaUKOKOirhARX+sn7XQBj86WELp?= =?us-ascii?Q?6QSJ5tpucV0nCHH1E9zEyE+8O/5tUxklEo6YphZGzZxEiAMb6mltinEAUAZZ?= =?us-ascii?Q?v8jplv4O5gVu9mlOp0vEmW08We5FEtP21EzJdeWpD8KLeY65otlGaBYZlVHv?= =?us-ascii?Q?ACKQ5EsbjMI2/eFDOwzhkPP+5LslnFv4DKIkym4FsyRE70/ahcsPfzs+vf9f?= =?us-ascii?Q?P4pTwaP595cKldATgBL8zYQnjyA5/82xlsrIi2aEs+LPguXUroh1pHm9FWbB?= =?us-ascii?Q?/On8YgggrG0vZh0TE6eyM8Wa658tHtFM/Z0E9N9P0H9UpYZ+tBJtxl5oJKbr?= =?us-ascii?Q?AFP8sGgxQhcBD/bx7iggqUgJYAwSBDg8+mTmq0UlKt1xA+LTmwChVFmx8GjI?= =?us-ascii?Q?yCuTB8sFzJ7K5GpyluvqlDYh3Snx6tcK1V7yg+PjBKDLRD7TwQ5pS4VD4i53?= =?us-ascii?Q?ilEtMTt6nCeP7k6Hnl7a7+Yw5f00VzgfwWZIJWkHlTUjiR1meY1gOU+MUr4E?= =?us-ascii?Q?g9KtSnoECUZGqAURYewbE4JgMVyNV1s9dtyhaKiB?= X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(82310400026)(1800799024)(36860700013)(376014)(13003099007)(7053199007); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Dec 2025 15:01:56.6893 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d883f98d-580f-43f5-6f65-08de40a1e299 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022575.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6068 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Hi, FYI, your patch has been queued to stable release 23.11.6 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 12/26/25. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/shanipr/dpdk-stable This queued commit can be viewed at: https://github.com/shanipr/dpdk-stable/commit/6170c4e649b34c6ea40cb3eecd4b3b882084f444 Thanks. Shani --- >From 6170c4e649b34c6ea40cb3eecd4b3b882084f444 Mon Sep 17 00:00:00 2001 From: Vamsi Attunuru Date: Mon, 14 Jul 2025 11:28:49 +0530 Subject: [PATCH] net/octeon_ep: fix device start [ upstream commit c892964faa605c7884b454b435c4fb663dff0c9e ] Currently the device start routine clears the TX doorbell and updates RX doorbell, which causes the device start operation to fail after a device stop. Patch corrects the handling of RX & TX doorbell and ensures that any pending packets in the RX queue are drained and gets refilled before starting the device. Fixes: 2c82554c98bd ("net/octeontx_ep: add device start and stop") Signed-off-by: Vamsi Attunuru --- drivers/net/octeon_ep/cnxk_ep_rx.c | 40 +++++++++++++++++++++++++++ drivers/net/octeon_ep/cnxk_ep_vf.c | 32 ++++++++++----------- drivers/net/octeon_ep/otx2_ep_vf.c | 30 +++++++++----------- drivers/net/octeon_ep/otx_ep_common.h | 1 + drivers/net/octeon_ep/otx_ep_ethdev.c | 6 ++++ drivers/net/octeon_ep/otx_ep_rxtx.h | 3 ++ 6 files changed, 77 insertions(+), 35 deletions(-) diff --git a/drivers/net/octeon_ep/cnxk_ep_rx.c b/drivers/net/octeon_ep/cnxk_ep_rx.c index 74f0011283..41b369bd6b 100644 --- a/drivers/net/octeon_ep/cnxk_ep_rx.c +++ b/drivers/net/octeon_ep/cnxk_ep_rx.c @@ -307,3 +307,43 @@ cn9k_ep_recv_pkts_mseg(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pk return new_pkts; } + +void +cnxk_ep_drain_rx_pkts(void *rx_queue) +{ + struct otx_ep_droq *droq = (struct otx_ep_droq *)rx_queue; + struct rte_mbuf *rx_pkt, *next_seg, *seg; + uint16_t i, j, nb_pkts; + + if (droq->read_idx == 0 && droq->pkts_pending == 0 && droq->refill_count) + return; + + /* Check for pending packets */ + nb_pkts = cnxk_ep_rx_pkts_to_process(droq, droq->nb_desc); + + /* Drain the pending packets */ + for (i = 0; i < nb_pkts; i++) { + rx_pkt = NULL; + cnxk_ep_process_pkts_scalar_mseg(&rx_pkt, droq, 1); + if (rx_pkt) { + seg = rx_pkt->next; + for (j = 1; j < rx_pkt->nb_segs; j++) { + next_seg = seg->next; + rte_mempool_put(droq->mpool, seg); + seg = next_seg; + } + rx_pkt->nb_segs = 1; + rte_mempool_put(droq->mpool, rx_pkt); + } + } + + cnxk_ep_rx_refill(droq); + + /* Reset the indexes */ + droq->read_idx = 0; + droq->write_idx = 0; + droq->refill_idx = 0; + droq->refill_count = 0; + droq->last_pkt_count = 0; + droq->pkts_pending = 0; +} diff --git a/drivers/net/octeon_ep/cnxk_ep_vf.c b/drivers/net/octeon_ep/cnxk_ep_vf.c index 74b63a161f..6e56cb3a73 100644 --- a/drivers/net/octeon_ep/cnxk_ep_vf.c +++ b/drivers/net/octeon_ep/cnxk_ep_vf.c @@ -138,6 +138,18 @@ cnxk_ep_vf_setup_iq_regs(struct otx_ep_device *otx_ep, uint32_t iq_no) return -EIO; } + /* Clear the IQ doorbell */ + loop = OTX_EP_BUSY_LOOP_COUNT; + while ((rte_read64(iq->doorbell_reg) != 0ull) && loop--) { + rte_write32(OTX_EP_CLEAR_INSTR_DBELL, iq->doorbell_reg); + rte_delay_ms(1); + } + + if (loop < 0) { + otx_ep_err("INSTR DBELL is not zero"); + return -EIO; + } + /* IN INTR_THRESHOLD is set to max(FFFFFFFF) which disable the IN INTR * to raise */ @@ -237,8 +249,8 @@ cnxk_ep_vf_setup_oq_regs(struct otx_ep_device *otx_ep, uint32_t oq_no) droq->pkts_sent_ism = (uint32_t *)((uint8_t *)otx_ep->ism_buffer_mz->addr + CNXK_EP_OQ_ISM_OFFSET(oq_no)); - otx_ep_err("SDP_R[%d] OQ ISM virt: %p dma: 0x%" PRIX64, - oq_no, (void *)droq->pkts_sent_ism, ism_addr); + otx_ep_err("SDP_R[%d] OQ ISM virt: %p dma: 0x%" PRIX64, oq_no, + (void *)(uintptr_t)droq->pkts_sent_ism, ism_addr); *droq->pkts_sent_ism = 0; droq->pkts_sent_ism_prev = 0; @@ -266,24 +278,8 @@ cnxk_ep_vf_setup_oq_regs(struct otx_ep_device *otx_ep, uint32_t oq_no) static int cnxk_ep_vf_enable_iq(struct otx_ep_device *otx_ep, uint32_t q_no) { - int loop = OTX_EP_BUSY_LOOP_COUNT; uint64_t reg_val = 0ull; - /* Resetting doorbells during IQ enabling also to handle abrupt - * guest reboot. IQ reset does not clear the doorbells. - */ - oct_ep_write64(0xFFFFFFFF, otx_ep->hw_addr + CNXK_EP_R_IN_INSTR_DBELL(q_no)); - - while (((oct_ep_read64(otx_ep->hw_addr + - CNXK_EP_R_IN_INSTR_DBELL(q_no))) != 0ull) && loop--) { - rte_delay_ms(1); - } - - if (loop < 0) { - otx_ep_err("INSTR DBELL not coming back to 0"); - return -EIO; - } - reg_val = oct_ep_read64(otx_ep->hw_addr + CNXK_EP_R_IN_ENABLE(q_no)); reg_val |= 0x1ull; diff --git a/drivers/net/octeon_ep/otx2_ep_vf.c b/drivers/net/octeon_ep/otx2_ep_vf.c index fdab542246..203933c7d2 100644 --- a/drivers/net/octeon_ep/otx2_ep_vf.c +++ b/drivers/net/octeon_ep/otx2_ep_vf.c @@ -287,6 +287,18 @@ otx2_vf_setup_iq_regs(struct otx_ep_device *otx_ep, uint32_t iq_no) return -EIO; } + /* Clear the IQ doorbell */ + loop = OTX_EP_BUSY_LOOP_COUNT; + while ((rte_read64(iq->doorbell_reg) != 0ull) && loop--) { + rte_write32(OTX_EP_CLEAR_INSTR_DBELL, iq->doorbell_reg); + rte_delay_ms(1); + } + + if (loop < 0) { + otx_ep_err("INSTR DBELL is not zero"); + return -EIO; + } + /* IN INTR_THRESHOLD is set to max(FFFFFFFF) which disable the IN INTR * to raise */ @@ -388,7 +400,7 @@ otx2_vf_setup_oq_regs(struct otx_ep_device *otx_ep, uint32_t oq_no) droq->pkts_sent_ism = (uint32_t *)((uint8_t *)otx_ep->ism_buffer_mz->addr + OTX2_EP_OQ_ISM_OFFSET(oq_no)); - otx_ep_err("SDP_R[%d] OQ ISM virt: %p, dma: 0x%x", oq_no, + otx_ep_dbg("SDP_R[%d] OQ ISM virt: %p, dma: 0x%x", oq_no, (void *)droq->pkts_sent_ism, (unsigned int)ism_addr); *droq->pkts_sent_ism = 0; @@ -411,24 +423,8 @@ otx2_vf_setup_oq_regs(struct otx_ep_device *otx_ep, uint32_t oq_no) static int otx2_vf_enable_iq(struct otx_ep_device *otx_ep, uint32_t q_no) { - int loop = SDP_VF_BUSY_LOOP_COUNT; uint64_t reg_val = 0ull; - /* Resetting doorbells during IQ enabling also to handle abrupt - * guest reboot. IQ reset does not clear the doorbells. - */ - oct_ep_write64(0xFFFFFFFF, otx_ep->hw_addr + SDP_VF_R_IN_INSTR_DBELL(q_no)); - - while (((oct_ep_read64(otx_ep->hw_addr + - SDP_VF_R_IN_INSTR_DBELL(q_no))) != 0ull) && loop--) { - rte_delay_ms(1); - } - - if (loop < 0) { - otx_ep_err("INSTR DBELL not coming back to 0"); - return -EIO; - } - reg_val = oct_ep_read64(otx_ep->hw_addr + SDP_VF_R_IN_ENABLE(q_no)); reg_val |= 0x1ull; diff --git a/drivers/net/octeon_ep/otx_ep_common.h b/drivers/net/octeon_ep/otx_ep_common.h index 938c51b35d..ccd4483058 100644 --- a/drivers/net/octeon_ep/otx_ep_common.h +++ b/drivers/net/octeon_ep/otx_ep_common.h @@ -579,6 +579,7 @@ int otx_ep_delete_oqs(struct otx_ep_device *otx_ep, uint32_t oq_no); #define OTX_EP_CLEAR_ISIZE_BSIZE 0x7FFFFFULL #define OTX_EP_CLEAR_OUT_INT_LVLS 0x3FFFFFFFFFFFFFULL #define OTX_EP_CLEAR_IN_INT_LVLS 0xFFFFFFFF +#define OTX_EP_CLEAR_INSTR_DBELL 0xFFFFFFFF #define OTX_EP_CLEAR_SDP_IN_INT_LVLS 0x3FFFFFFFFFFFFFUL #define OTX_EP_DROQ_BUFSZ_MASK 0xFFFF #define OTX_EP_CLEAR_SLIST_DBELL 0xFFFFFFFF diff --git a/drivers/net/octeon_ep/otx_ep_ethdev.c b/drivers/net/octeon_ep/otx_ep_ethdev.c index c0298a56ac..51e3ed6576 100644 --- a/drivers/net/octeon_ep/otx_ep_ethdev.c +++ b/drivers/net/octeon_ep/otx_ep_ethdev.c @@ -177,6 +177,12 @@ otx_ep_dev_start(struct rte_eth_dev *eth_dev) int ret; otx_epvf = (struct otx_ep_device *)OTX_EP_DEV(eth_dev); + + for (q = 0; q < otx_epvf->nb_rx_queues; q++) { + cnxk_ep_drain_rx_pkts(otx_epvf->droq[q]); + otx_epvf->fn_list.setup_oq_regs(otx_epvf, q); + } + /* Enable IQ/OQ for this device */ ret = otx_epvf->fn_list.enable_io_queues(otx_epvf); if (ret) { diff --git a/drivers/net/octeon_ep/otx_ep_rxtx.h b/drivers/net/octeon_ep/otx_ep_rxtx.h index cb68ef3b41..9a63974094 100644 --- a/drivers/net/octeon_ep/otx_ep_rxtx.h +++ b/drivers/net/octeon_ep/otx_ep_rxtx.h @@ -30,6 +30,9 @@ otx_ep_incr_index(uint32_t index, uint32_t count, uint32_t max) return ((index + count) & (max - 1)); } +void +cnxk_ep_drain_rx_pkts(void *rx_queue); + uint16_t otx_ep_xmit_pkts(void *tx_queue, struct rte_mbuf **pkts, uint16_t nb_pkts); -- 2.43.0 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2025-12-21 16:54:19.501857701 +0200 +++ 0043-net-octeon_ep-fix-device-start.patch 2025-12-21 16:54:17.062099000 +0200 @@ -1 +1 @@ -From c892964faa605c7884b454b435c4fb663dff0c9e Mon Sep 17 00:00:00 2001 +From 6170c4e649b34c6ea40cb3eecd4b3b882084f444 Mon Sep 17 00:00:00 2001 @@ -5,0 +6,2 @@ +[ upstream commit c892964faa605c7884b454b435c4fb663dff0c9e ] + @@ -15 +16,0 @@ -Cc: stable@dpdk.org @@ -28 +29 @@ -index a10e9c536e..9678cec90b 100644 +index 74f0011283..41b369bd6b 100644 @@ -31 +32 @@ -@@ -151,3 +151,43 @@ cn9k_ep_recv_pkts_mseg(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pk +@@ -307,3 +307,43 @@ cn9k_ep_recv_pkts_mseg(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pk @@ -76 +77 @@ -index ca84cac962..a1d9f65f38 100644 +index 74b63a161f..6e56cb3a73 100644 @@ -100 +101 @@ - (uint32_t __rte_atomic *)((uint8_t *)otx_ep->ism_buffer_mz->addr + (uint32_t *)((uint8_t *)otx_ep->ism_buffer_mz->addr @@ -103,3 +104,3 @@ -- oq_no, (void *)(uintptr_t)droq->pkts_sent_ism, ism_addr); -+ otx_ep_dbg("SDP_R[%d] OQ ISM virt: %p dma: 0x%" PRIX64, oq_no, -+ (void *)(uintptr_t)droq->pkts_sent_ism, ism_addr); +- oq_no, (void *)droq->pkts_sent_ism, ism_addr); ++ otx_ep_err("SDP_R[%d] OQ ISM virt: %p dma: 0x%" PRIX64, oq_no, ++ (void *)(uintptr_t)droq->pkts_sent_ism, ism_addr); @@ -107 +108 @@ - droq->pkts_sent_prev = 0; + droq->pkts_sent_ism_prev = 0; @@ -135 +136 @@ -index a482f4266e..00f723a5a8 100644 +index fdab542246..203933c7d2 100644 @@ -159 +160 @@ - (uint32_t __rte_atomic *)((uint8_t *)otx_ep->ism_buffer_mz->addr + (uint32_t *)((uint8_t *)otx_ep->ism_buffer_mz->addr @@ -163 +164 @@ - (void *)(uintptr_t)droq->pkts_sent_ism, + (void *)droq->pkts_sent_ism, @@ -192 +193 @@ -index 122926cd40..53de8b18d6 100644 +index 938c51b35d..ccd4483058 100644 @@ -195 +196 @@ -@@ -589,6 +589,7 @@ int otx_ep_delete_oqs(struct otx_ep_device *otx_ep, uint32_t oq_no); +@@ -579,6 +579,7 @@ int otx_ep_delete_oqs(struct otx_ep_device *otx_ep, uint32_t oq_no); @@ -204 +205 @@ -index 10f2f8a2e0..cd8e4bad3b 100644 +index c0298a56ac..51e3ed6576 100644 @@ -207 +208 @@ -@@ -232,6 +232,12 @@ otx_ep_dev_start(struct rte_eth_dev *eth_dev) +@@ -177,6 +177,12 @@ otx_ep_dev_start(struct rte_eth_dev *eth_dev) @@ -221 +222 @@ -index 6b3abe21b1..384e4fb412 100644 +index cb68ef3b41..9a63974094 100644 @@ -224 +225 @@ -@@ -32,6 +32,9 @@ otx_ep_incr_index(uint32_t index, uint32_t count, uint32_t max) +@@ -30,6 +30,9 @@ otx_ep_incr_index(uint32_t index, uint32_t count, uint32_t max)