From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4E2E2A04B1 for ; Tue, 24 Nov 2020 09:24:52 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 21DE1C90C; Tue, 24 Nov 2020 09:24:51 +0100 (CET) Received: from out2-smtp.messagingengine.com (out2-smtp.messagingengine.com [66.111.4.26]) by dpdk.org (Postfix) with ESMTP id 7BD50C90C; Tue, 24 Nov 2020 09:24:48 +0100 (CET) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailout.nyi.internal (Postfix) with ESMTP id CBC835C01DE; Tue, 24 Nov 2020 03:24:46 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute2.internal (MEProxy); Tue, 24 Nov 2020 03:24:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm2; bh= eXOgZm0df5M5nxaWoMXfqOhdAoDEywxg2/VxXYNMLSU=; b=UdWAwG6nO+erQPCZ s1mFDPNXCOQYYMLi2bmBAj6iZfSOzMXXOq2rF7UD6IpY4jPXHvhKwsPsBxT1TYq7 VHIh6bxMX9Lo9pELAk6QmA4xtvxCEdCugO/rwbquSL7oK5w0Z46nKdB70Ak5vyw9 QnQda8BqZ4RhMDHlDLhDpxFs9T0ABAYt+D/SNkWJxZD0NfpHP7OUrFWWGgmuuA66 6xlRsHxlescONjE9UWvxQk4vfVMj7Iv+MMHV4l1xg0zJWwqZ1HWJMf7rnCP+NHRY k1S2WZHxST0Z6AEUnQe0oQfhqqxSSp7NnaUblDziIanuzB9dJw9wbvZv/Ex5yNR9 IC1YwA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm1; bh=eXOgZm0df5M5nxaWoMXfqOhdAoDEywxg2/VxXYNML SU=; b=QOQNfcnwnLWU/VdGZF8w3L1p6gTpuAXyZXKdpI8WF7xtAgRbwLeBwcZAT L7577W4UPhbYAIBDskEP3LU7OSFqgpIsjkZmsTAyubURv4AbO0ioiLY4eAP5dTUj RAw7cVg6S0H2gvSewRTMl6sKV+X8tUfl6qXS6z40grJiLylRreyBNpFTDSkmH01z Yv4nJMOWdn+iYrRWqvU5ZCe8Y4S4iwGAQ9+RSn3YyDoERUhzOFdcfco2kJINo1hb tiIwti3HxeUWDqUm1wjZ003lyxrcFTrofDK9dGee8P5HQtHq4hK8UUi5fZz4oeuX jI08+Q9D/GishrpbuqD3qwYLo82cA== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrudegjedgudegiecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhm rghsucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenuc ggtffrrghtthgvrhhnpedugefgvdefudfftdefgeelgffhueekgfffhfeujedtteeutdej ueeiiedvffegheenucfkphepjeejrddufeegrddvtdefrddukeegnecuvehluhhsthgvrh fuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepthhhohhmrghssehmohhnjhgr lhhonhdrnhgvth X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id A24D63064AA7; Tue, 24 Nov 2020 03:24:45 -0500 (EST) From: Thomas Monjalon To: Igor Ryzhov , dev , "Guo, Jia" Cc: dpdk stable , "Xing, Beilei" , ferruh.yigit@intel.com Date: Tue, 24 Nov 2020 09:24:41 +0100 Message-ID: <2232269.sFVF7DV9YO@thomas> In-Reply-To: <2ada7ab1daa242ae8e256b8432141d32@intel.com> References: <20201117085639.40307-1-iryzhov@nfware.com> <2ada7ab1daa242ae8e256b8432141d32@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-stable] [PATCH] net/i40e: fix counters X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" I will follow the recommendation of Ferruh and i40e maintainers. It is risky but it can be applied just before the release. 24/11/2020 04:34, Guo, Jia: > hi, igor ryzhov and Thomas > > Since this remain issue is report recently and we need to reproduce the issue and evaluate the patch and guaranty no side affect for other case, > so I am not sure even I don't think it still have time window to hit 20.11. But whatever we have begin to check your patch for now on. What do you think so? > > > From: Igor Ryzhov > Sent: Friday, November 20, 2020 2:27 AM > To: dev > Cc: dpdk stable ; Xing, Beilei ; Guo, Jia ; Thomas Monjalon > Subject: Re: [PATCH] net/i40e: fix counters > > CC maintainers and Thomas. > > This fix should be 20.11. The issue is seen multiple times a day under ~20G traffic with stats collection once per second. > > Igor > > On Tue, Nov 17, 2020 at 11:56 AM Igor Ryzhov > wrote: > When low and high registers are read separately, this opens the door to > a race condition: > - low register is read > - NIC updates the registers > - high register is read > > Because of this, we may end up with an incorrect counter value. > Let's read the registers in one shot, as it is done in Linux kernel > since the introduction of the i40e driver. > > Fixes: 4861cde46116 ("i40e: new poll mode driver") > Cc: stable@dpdk.org > Signed-off-by: Igor Ryzhov > > --- > drivers/net/i40e/base/i40e_osdep.h | 10 ++++++++++ > drivers/net/i40e/i40e_ethdev.c | 10 +++++++--- > 2 files changed, 17 insertions(+), 3 deletions(-) > > diff --git a/drivers/net/i40e/base/i40e_osdep.h b/drivers/net/i40e/base/i40e_osdep.h > index 64b15e1b6138..ebd687240006 100644 > --- a/drivers/net/i40e/base/i40e_osdep.h > +++ b/drivers/net/i40e/base/i40e_osdep.h > @@ -133,6 +133,14 @@ static inline uint32_t i40e_read_addr(volatile void *addr) > return rte_le_to_cpu_32(I40E_PCI_REG(addr)); > } > > +#define I40E_PCI_REG64(reg) rte_read64(reg) > +#define I40E_PCI_REG64_ADDR(a, reg) \ > + ((volatile uint64_t *)((char *)(a)->hw_addr + (reg))) > +static inline uint64_t i40e_read64_addr(volatile void *addr) > +{ > + return rte_le_to_cpu_64(I40E_PCI_REG64(addr)); > +} > + > #define I40E_PCI_REG_WRITE(reg, value) \ > rte_write32((rte_cpu_to_le_32(value)), reg) > #define I40E_PCI_REG_WRITE_RELAXED(reg, value) \ > @@ -145,6 +153,8 @@ static inline uint32_t i40e_read_addr(volatile void *addr) > #define I40E_WRITE_REG(hw, reg, value) \ > I40E_PCI_REG_WRITE(I40E_PCI_REG_ADDR((hw), (reg)), (value)) > > +#define I40E_READ_REG64(hw, reg) i40e_read64_addr(I40E_PCI_REG64_ADDR((hw), (reg))) > + > #define rd32(a, reg) i40e_read_addr(I40E_PCI_REG_ADDR((a), (reg))) > #define wr32(a, reg, value) \ > I40E_PCI_REG_WRITE(I40E_PCI_REG_ADDR((a), (reg)), (value)) > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c > index 74f4ac1f9d4e..53b1e9b9e067 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -6451,9 +6451,13 @@ i40e_stat_update_48(struct i40e_hw *hw, > { > uint64_t new_data; > > - new_data = (uint64_t)I40E_READ_REG(hw, loreg); > - new_data |= ((uint64_t)(I40E_READ_REG(hw, hireg) & > - I40E_16_BIT_MASK)) << I40E_32_BIT_WIDTH; > + if (hw->device_id == I40E_DEV_ID_QEMU) { > + new_data = (uint64_t)I40E_READ_REG(hw, loreg); > + new_data |= ((uint64_t)(I40E_READ_REG(hw, hireg) & > + I40E_16_BIT_MASK)) << I40E_32_BIT_WIDTH; > + } else { > + new_data = I40E_READ_REG64(hw, loreg); > + } > > if (!offset_loaded) > *offset = new_data; > -- > 2.29.2 >