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From: Thomas Monjalon <thomas@monjalon.net>
To: "Li, Xiaoyun" <xiaoyun.li@intel.com>
Cc: dev@dpdk.org, "stable@dpdk.org" <stable@dpdk.org>, "Wu,
Jingjing" <jingjing.wu@intel.com>, gavin.hu@arm.com
Date: Mon, 20 Jan 2020 10:04:18 +0100
Message-ID: <2857314.xlVK0Xs8nM@xps>
In-Reply-To: <9BB6961774997848B5B42BEC655768F8115C8E0D@SHSMSX103.ccr.corp.intel.com>
References: <20191204151916.12607-1-xiaoyun.li@intel.com>
<9BB6961774997848B5B42BEC655768F8115C8E0D@SHSMSX103.ccr.corp.intel.com>
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Subject: Re: [dpdk-stable] [dpdk-dev] [PATCH] raw/ntb: fix write memory
barrier issue
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Sender: "stable" <stable-bounces@dpdk.org>
26/12/2019 02:46, Wu, Jingjing:
> From: Li, Xiaoyun <xiaoyun.li@intel.com>
> > All buffers and ring info should be written before tail register update.
> > This patch relocates the write memory barrier before updating tail register
> > to avoid potential issues.
> >
> > Fixes: 11b5c7daf019 ("raw/ntb: add enqueue and dequeue functions")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
> Acked-by: Jingjing Wu <jingjing.wu@intel.com>
v1 applied, thanks