From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6C67EA00C4 for ; Fri, 5 Jun 2020 09:52:06 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 45BAB1D5DA; Fri, 5 Jun 2020 09:52:06 +0200 (CEST) Received: from mail-wm1-f67.google.com (mail-wm1-f67.google.com [209.85.128.67]) by dpdk.org (Postfix) with ESMTP id 0E0B11D5DA for ; Fri, 5 Jun 2020 09:52:05 +0200 (CEST) Received: by mail-wm1-f67.google.com with SMTP id q25so8117281wmj.0 for ; Fri, 05 Jun 2020 00:52:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:message-id:subject:from:to:cc:date:in-reply-to :references:content-transfer-encoding:user-agent:mime-version; bh=WO+UtfzFXh0kq0DLEXI596BtYrPDjITnQwKvQnV3NYM=; b=RO801tZgA2Bkikx3IAbyA7ANSVWVogn2sfE/uEKe2IFTPn7Wdg+GFCMyS2qhWi6g/l nBkBgC1MdnXP4yn9Vatnp+f1o4nG6o+aSGS9ZLuH3Bbrw53KZJKkxBzpS/IjXWV4lO8T rS97hELqiWnIqfdGVVc5imuopOPFdP/J7Nu0LoHiP6ss8VVo0i0HzpE9wHJ/cz29UuPC DA/Mdvnjb02FNRMiuF9e8BcViZ5RO8eqeVgADrT8itbh2NRWZ/N+GEqPc5vursqJcrDA B0hyB5asyXkXyrPgQtEI/axeUi6m1Iy2BmDP22MRXD6NFiMUVp1aIHHN4c4QZMFbjjzG L4Rg== X-Gm-Message-State: AOAM531mDqK62HIyQWHMPxXzTbh02WOBx/Gys52S0fxaJnLi3iUYBzmp d6DE7R8jByoPOeFnzARugCQ= X-Google-Smtp-Source: ABdhPJzAvisgxN1PNRb2mFiofFNHq3KzatZH+vMygCY6jVNeRsE17NFQuBPFphS9VxK/OvwZRx9lZQ== X-Received: by 2002:a05:600c:48e:: with SMTP id d14mr1436321wme.133.1591343524634; Fri, 05 Jun 2020 00:52:04 -0700 (PDT) Received: from localhost ([88.98.246.218]) by smtp.gmail.com with ESMTPSA id v19sm10167761wml.26.2020.06.05.00.52.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2020 00:52:03 -0700 (PDT) Message-ID: <3e08e9083bad107a83ccb61d70aa2ef7d02c4734.camel@debian.org> From: Luca Boccassi To: "Trahe, Fiona" , "Dybkowski, AdamX" Cc: dpdk stable Date: Fri, 05 Jun 2020 08:52:03 +0100 In-Reply-To: References: <20200519125804.104349-1-luca.boccassi@gmail.com> <20200519125804.104349-61-luca.boccassi@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.30.5-1.1 MIME-Version: 1.0 Subject: Re: [dpdk-stable] patch 'common/qat: fix GEN3 marketing name' has been queued to stable release 19.11.3 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, Ok, seems safe enough to revert after validation has been performed On Thu, 2020-06-04 at 17:13 +0000, Trahe, Fiona wrote: > Hi Luca,=20 >=20 > Sorry about the delay in responding to this - but I just found out that I= ntel don't want to do this after all. > We need to revert it in 20.08. > I can see you already applied it on 19.11.3.rc1, please, can you drop it. > Sorry for wasting your time with this. >=20 > Regards, > Fiona >=20 >=20 > > -----Original Message----- > > From: luca.boccassi@gmail.com > > Sent: Tuesday, May 19, 2020 1:54 PM > > To: Dybkowski, AdamX > > Cc: Trahe, Fiona ; dpdk stable > > Subject: patch 'common/qat: fix GEN3 marketing name' has been queued to= stable release 19.11.3 > >=20 > > Hi, > >=20 > > FYI, your patch has been queued to stable release 19.11.3 > >=20 > > Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. > > It will be pushed if I get no objections before 05/21/20. So please > > shout if anyone has objections. > >=20 > > Also note that after the patch there's a diff of the upstream commit vs= the > > patch applied to the branch. This will indicate if there was any rebasi= ng > > needed to apply to the stable branch. If there were code changes for re= basing > > (ie: not only metadata diffs), please double check that the rebase was > > correctly done. > >=20 > > Thanks. > >=20 > > Luca Boccassi > >=20 > > --- > > From 152fadd540a9f72046a0411522c95997636d1d55 Mon Sep 17 00:00:00 2001 > > From: Adam Dybkowski > > Date: Wed, 4 Mar 2020 14:18:35 +0100 > > Subject: [PATCH] common/qat: fix GEN3 marketing name > >=20 > > [ upstream commit 9cd9d3e702fba4700539c1a2eddac13dd14ecf70 ] > >=20 > > This patch fixes the marketing name of the QAT GEN3 to P5xxx. > > Updates this name mentioned in the compression PMD as well as > > in the documentation. > >=20 > > Fixes: aa983f03ad2e ("crypto/qat: handle Single Pass Crypto Requests on= GEN3") > > Fixes: a124830a6f00 ("compress/qat: enable dynamic huffman encoding") > > Fixes: 1f5e4053f9b4 ("common/qat: support GEN3 devices") > >=20 > > Signed-off-by: Adam Dybkowski > > Acked-by: Fiona Trahe > > --- > > doc/guides/cryptodevs/qat.rst | 6 +++--- > > doc/guides/rel_notes/release_19_11.rst | 2 +- > > drivers/compress/qat/qat_comp_pmd.c | 2 +- > > 3 files changed, 5 insertions(+), 5 deletions(-) > >=20 > > diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.= rst > > index 6197875fe3..5ab80b1c0f 100644 > > --- a/doc/guides/cryptodevs/qat.rst > > +++ b/doc/guides/cryptodevs/qat.rst > > @@ -23,7 +23,7 @@ poll mode crypto driver support for the following har= dware accelerator devices: > > * ``Intel QuickAssist Technology C62x`` > > * ``Intel QuickAssist Technology C3xxx`` > > * ``Intel QuickAssist Technology D15xx`` > > -* ``Intel QuickAssist Technology C4xxx`` > > +* ``Intel QuickAssist Technology P5xxx`` > >=20 > >=20 > > Features > > @@ -122,7 +122,7 @@ poll mode crypto driver support for the following h= ardware accelerator > > devices: > > * ``Intel QuickAssist Technology C62x`` > > * ``Intel QuickAssist Technology C3xxx`` > > * ``Intel QuickAssist Technology D15xx`` > > -* ``Intel QuickAssist Technology C4xxx`` > > +* ``Intel QuickAssist Technology P5xxx`` > >=20 > > The QAT ASYM PMD has support for: > >=20 > > @@ -323,7 +323,7 @@ to see the full table) > > +-----+-----+-----+-----+----------+---------------+---------------= +------------+--------+------+--------+--------+ > > | Yes | No | No | 2 | D15xx | p | qat_d15xx = | d15xx | 6f54 | 1 | 6f55 | 16 | > > +-----+-----+-----+-----+----------+---------------+---------------= +------------+--------+------+--------+--------+ > > - | Yes | No | No | 3 | C4xxx | p | qat_c4xxx = | c4xxx | 18a0 | 1 | 18a1 | 128 | > > + | Yes | No | No | 3 | P5xxx | p | qat_p5xxx = | p5xxx | 18a0 | 1 | 18a1 | 128 | > > +-----+-----+-----+-----+----------+---------------+---------------= +------------+--------+------+--------+--------+ > >=20 > > The first 3 columns indicate the service: > > diff --git a/doc/guides/rel_notes/release_19_11.rst b/doc/guides/rel_no= tes/release_19_11.rst > > index 56f169f7f2..edf103b5f6 100644 > > --- a/doc/guides/rel_notes/release_19_11.rst > > +++ b/doc/guides/rel_notes/release_19_11.rst > > @@ -260,7 +260,7 @@ New Features > > * **Enabled Single Pass GCM acceleration on QAT GEN3.** > >=20 > > Added support for Single Pass GCM, available on QAT GEN3 only (Intel > > - QuickAssist Technology C4xxx). It is automatically chosen instead of= the > > + QuickAssist Technology P5xxx). It is automatically chosen instead of= the > > classic 2-pass mode when running on QAT GEN3, significantly improvin= g > > the performance of AES GCM operations. > >=20 > > diff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat= /qat_comp_pmd.c > > index 05b7dfe774..eb3e422b27 100644 > > --- a/drivers/compress/qat/qat_comp_pmd.c > > +++ b/drivers/compress/qat/qat_comp_pmd.c > > @@ -663,7 +663,7 @@ int > > qat_comp_dev_create(struct qat_pci_device *qat_pci_dev) > > { > > if (qat_pci_dev->qat_dev_gen =3D=3D QAT_GEN3) { > > - QAT_LOG(ERR, "Compression PMD not supported on QAT c4xxx"); > > + QAT_LOG(ERR, "Compression PMD not supported on QAT P5xxx"); > > return 0; > > } > >=20 > > -- > > 2.20.1 > >=20 > > --- > > Diff of the applied patch vs upstream commit (please double-check if = non-empty: > > --- > > --- - 2020-05-19 13:56:21.315333455 +0100 > > +++ 0061-common-qat-fix-GEN3-marketing-name.patch 2020-05-19 13:56:18.2= 91503115 > > +0100 > > @@ -1,8 +1,10 @@ > > -From 9cd9d3e702fba4700539c1a2eddac13dd14ecf70 Mon Sep 17 00:00:00 2001 > > +From 152fadd540a9f72046a0411522c95997636d1d55 Mon Sep 17 00:00:00 2001 > > From: Adam Dybkowski > > Date: Wed, 4 Mar 2020 14:18:35 +0100 > > Subject: [PATCH] common/qat: fix GEN3 marketing name > >=20 > > +[ upstream commit 9cd9d3e702fba4700539c1a2eddac13dd14ecf70 ] > > + > > This patch fixes the marketing name of the QAT GEN3 to P5xxx. > > Updates this name mentioned in the compression PMD as well as > > in the documentation. > > @@ -10,7 +12,6 @@ > > Fixes: aa983f03ad2e ("crypto/qat: handle Single Pass Crypto Requests o= n GEN3") > > Fixes: a124830a6f00 ("compress/qat: enable dynamic huffman encoding") > > Fixes: 1f5e4053f9b4 ("common/qat: support GEN3 devices") > > -Cc: stable@dpdk.org > >=20 > > Signed-off-by: Adam Dybkowski > > Acked-by: Fiona Trahe > > @@ -21,7 +22,7 @@ > > 3 files changed, 5 insertions(+), 5 deletions(-) > >=20 > > diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat= .rst > > -index 06985e3193..1e83ed6267 100644 > > +index 6197875fe3..5ab80b1c0f 100644 > > --- a/doc/guides/cryptodevs/qat.rst > > +++ b/doc/guides/cryptodevs/qat.rst > > @@ -23,7 +23,7 @@ poll mode crypto driver support for the following ha= rdware accelerator devices: > > @@ -33,7 +34,7 @@ > >=20 > >=20 > > Features > > -@@ -149,7 +149,7 @@ poll mode crypto driver support for the following = hardware accelerator > > devices: > > +@@ -122,7 +122,7 @@ poll mode crypto driver support for the following = hardware accelerator > > devices: > > * ``Intel QuickAssist Technology C62x`` > > * ``Intel QuickAssist Technology C3xxx`` > > * ``Intel QuickAssist Technology D15xx`` > > @@ -42,7 +43,7 @@ > >=20 > > The QAT ASYM PMD has support for: > >=20 > > -@@ -376,7 +376,7 @@ to see the full table) > > +@@ -323,7 +323,7 @@ to see the full table) > > +-----+-----+-----+-----+----------+---------------+--------------= -+------------+--------+------+--------+-------- > > + > > | Yes | No | No | 2 | D15xx | p | qat_d15xx = | d15xx | 6f54 | 1 | 6f55 | 16 | > > +-----+-----+-----+-----+----------+---------------+--------------= -+------------+--------+------+--------+-------- > > + > > @@ -52,7 +53,7 @@ > >=20 > > The first 3 columns indicate the service: > > diff --git a/doc/guides/rel_notes/release_19_11.rst b/doc/guides/rel_n= otes/release_19_11.rst > > -index eb05149f8f..0261d28431 100644 > > +index 56f169f7f2..edf103b5f6 100644 > > --- a/doc/guides/rel_notes/release_19_11.rst > > +++ b/doc/guides/rel_notes/release_19_11.rst > > @@ -260,7 +260,7 @@ New Features > > @@ -65,12 +66,12 @@ > > the performance of AES GCM operations. > >=20 > > diff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qa= t/qat_comp_pmd.c > > -index 7d4fdf10c2..9a7ed19d76 100644 > > +index 05b7dfe774..eb3e422b27 100644 > > --- a/drivers/compress/qat/qat_comp_pmd.c > > +++ b/drivers/compress/qat/qat_comp_pmd.c > > -@@ -666,7 +666,7 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci= _dev, > > +@@ -663,7 +663,7 @@ int > > + qat_comp_dev_create(struct qat_pci_device *qat_pci_dev) > > { > > - int i =3D 0; > > if (qat_pci_dev->qat_dev_gen =3D=3D QAT_GEN3) { > > - QAT_LOG(ERR, "Compression PMD not supported on QAT c4xxx"); > > + QAT_LOG(ERR, "Compression PMD not supported on QAT P5xxx");