From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 01EE3A0C49 for ; Wed, 16 Jun 2021 20:43:05 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F11814069C; Wed, 16 Jun 2021 20:43:04 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id F01B940DFD for ; Wed, 16 Jun 2021 20:43:03 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15GIVU4J023398; Wed, 16 Jun 2021 11:43:03 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=UT7nrCi7TejlBX9ba5xADBTFYplJL/Q455rPH5EDjcE=; b=Ck8CMSvtESkDgHC67aE0L54bHkg8OPbzKJhOa91B/CorDTSK6zqNA/S5XvA4hoXKYnO/ ii0f4g0aryGa57hlXBF/VCP+zxy6eAu2OW8F7FSSH1VhxVkemqPVI34ZAUntjMP4YGJl lluo1pkYMbABtAzcwIvXrKBKL6WD73/mtiCXy1p88MhcTbgGDFLDJJd6S+cxMVJyWA7w /SgKEuSSoJug9bB4/lSA0VcuJqyh63JYnsyMya5AGf8OtNYf8bhMyDvdu/HKW0RjHD/Q plS0VtpQnrp0ijkRxrVIZzkkPZChPWd7mhMIss6t+h1guGq8XK3eNoat0DGesST8Oc4T 6Q== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 396tagyy0j-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 16 Jun 2021 11:43:03 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 16 Jun 2021 11:43:00 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 16 Jun 2021 11:43:00 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id 367153F7079; Wed, 16 Jun 2021 11:42:58 -0700 (PDT) From: Shijith Thotton To: CC: Shijith Thotton , , Date: Thu, 17 Jun 2021 00:12:09 +0530 Message-ID: <7a60c55f763a557a7557c79644e5563653c15661.1623868710.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: jZBfT5FJhXw6PVc9l4AkJEeLosANiEV0 X-Proofpoint-GUID: jZBfT5FJhXw6PVc9l4AkJEeLosANiEV0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-16_11:2021-06-15, 2021-06-16 signatures=0 Subject: [dpdk-stable] [PATCH 20.11 2/3] event/octeontx2: configure crypto adapter xaq pool X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" [ upstream commit 849111aec74dd3282a70b540683fcdc86be155d8 ] Configure xaq pool based on number of in-use crypto queues to avoid CPT add work failure due to xaq buffer run out. This patch configures OTX2_CPT_DEFAULT_CMD_QLEN number of xae entries per queue pair. Fixes: 29768f78d5a7 ("event/octeontx2: add crypto adapter framework") Signed-off-by: Shijith Thotton Acked-by: Pavan Nikhilesh --- drivers/event/octeontx2/otx2_evdev_adptr.c | 2 +- drivers/event/octeontx2/otx2_evdev_crypto_adptr.c | 8 ++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/event/octeontx2/otx2_evdev_adptr.c b/drivers/event/octeontx2/otx2_evdev_adptr.c index d69f269df..d85c3665c 100644 --- a/drivers/event/octeontx2/otx2_evdev_adptr.c +++ b/drivers/event/octeontx2/otx2_evdev_adptr.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(C) 2019 Marvell International Ltd. + * Copyright(C) 2019-2021 Marvell. */ #include "otx2_evdev.h" diff --git a/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c b/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c index c6a4fbaf4..82bccd34e 100644 --- a/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c +++ b/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c @@ -88,6 +88,14 @@ otx2_ca_qp_add(const struct rte_eventdev *dev, const struct rte_cryptodev *cdev, sso_evdev->rx_offloads |= NIX_RX_OFFLOAD_SECURITY_F; sso_fastpath_fns_set((struct rte_eventdev *)(uintptr_t)dev); + /* Update crypto adapter xae count */ + if (queue_pair_id == -1) + sso_evdev->adptr_xae_cnt += + vf->nb_queues * OTX2_CPT_DEFAULT_CMD_QLEN; + else + sso_evdev->adptr_xae_cnt += OTX2_CPT_DEFAULT_CMD_QLEN; + sso_xae_reconfigure((struct rte_eventdev *)(uintptr_t)dev); + return 0; } -- 2.25.1