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Fri, 30 Nov 2018 18:02:19 +0000 From: Yongseok Koh To: Tiwei Bie CC: Brian Russell , Luca Boccassi , dpdk stable Thread-Topic: patch 'net/virtio: fix PCI config error handling' has been queued to LTS release 17.11.5 Thread-Index: AQHUiMED65konck7mUW16XqvlgATXaVonCgA Date: Fri, 30 Nov 2018 18:02:19 +0000 Message-ID: References: <20181129231202.30436-1-yskoh@mellanox.com> <20181129231202.30436-85-yskoh@mellanox.com> <20181130152336.GA14244@debian> In-Reply-To: <20181130152336.GA14244@debian> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; x-originating-ip: [209.17.37.123] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; DB3PR0502MB4011; 6:EPqVK5aw1a6zri+VEGqfvy7tfxdRtqTrcDTn0lSHG4Vc1198oHq/zxrFrhOG0OZCRWg2Bta07UdJLT3WTnLps1Lu3QtOEeTQMMX+4Q/I7kiV36AzOB6AFZuDQ+oefnqMi/m9BD91kUpdGdYylmYC+ED6YRgblPIHACpVaSsEShxUNdwjhZHjG+Q4JHcBSUl9+TPMveAZKKrNj5dGF2ILQoVC/K7PksWdW/qbP4Cx4+Uq7e/dYFbASFm83SFDomCrdum7lG+U61iOderYLeIHbMLRkDmse9EvR0n/PsBK+g+OxzdkTsulR3uRu/g1UTtVaGoSjdt7ENt+K4dMPxassDjIHAI+mazMp+HzpCHDKIr5p7F1tM9UMBGdeiaf+hoqXGR5cx4FQexMTcAyF/bIqngRB0mP7fmnB87GXAZ54aJcL5xEdylNB4G0eJYtK4wDdyMymcybjR/ZKZPXlSrw4A==; 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charset="us-ascii" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: c269963c-d0c4-49e6-2054-08d656edf85e X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Nov 2018 18:02:19.1941 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0502MB4011 Subject: Re: [dpdk-stable] patch 'net/virtio: fix PCI config error handling' has been queued to LTS release 17.11.5 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 30 Nov 2018 18:02:20 -0000 > On Nov 30, 2018, at 7:23 AM, Tiwei Bie wrote: >=20 > On Thu, Nov 29, 2018 at 03:11:19PM -0800, Yongseok Koh wrote: >> Hi, >>=20 >> FYI, your patch has been queued to LTS release 17.11.5 >>=20 >> Note it hasn't been pushed to https://emea01.safelinks.protection.outloo= k.com/?url=3Dhttp%3A%2F%2Fdpdk.org%2Fbrowse%2Fdpdk-stable&data=3D02%7C0= 1%7Cyskoh%40mellanox.com%7C1766cef373824913300308d656d824fa%7Ca652971c7d2e4= d9ba6a4d149256f461b%7C0%7C0%7C636791883664358292&sdata=3DqS38KVRaj5V%2B= AjZkosvooP7Zj%2F1EC52pOgdA5hyU8mw%3D&reserved=3D0 yet. >> It will be pushed if I get no objections before 12/01/18. So please >> shout if anyone has objections. >=20 > Hi, >=20 > This patch can't be backported, as it depends on some API > change in newer release. This patch could be applied cleanly but I'll remove it. Thanks for confirming, Yongseok >>=20 >> Also note that after the patch there's a diff of the upstream commit vs = the patch applied >> to the branch. If the code is different (ie: not only metadata diffs), d= ue for example to >> a change in context or macro names, please double check it. >>=20 >> Thanks. >>=20 >> Yongseok >>=20 >> --- >> From b5196f660ce80df58babdd718f26ff980a841513 Mon Sep 17 00:00:00 2001 >> From: Brian Russell >> Date: Tue, 28 Aug 2018 11:12:40 +0100 >> Subject: [PATCH] net/virtio: fix PCI config error handling >>=20 >> [ upstream commit 49bb1f7a0ab760a0f1fb39e27c90a1cb2ad42edd ] >>=20 >> In virtio_read_caps and vtpci_msix_detect, rte_pci_read_config returns >> the number of bytes read from PCI config or < 0 on error. >> If less than the expected number of bytes are read then log the >> failure and return rather than carrying on with garbage. >>=20 >> Fixes: 6ba1f63b5ab0 ("virtio: support specification 1.0") >>=20 >> Signed-off-by: Brian Russell >> Signed-off-by: Luca Boccassi >> Reviewed-by: Tiwei Bie >> --- >> drivers/net/virtio/virtio_pci.c | 65 ++++++++++++++++++++++++++++++-----= ------ >> 1 file changed, 48 insertions(+), 17 deletions(-) >>=20 >> diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio= _pci.c >> index 9574498fb..89986c335 100644 >> --- a/drivers/net/virtio/virtio_pci.c >> +++ b/drivers/net/virtio/virtio_pci.c >> @@ -596,16 +596,18 @@ virtio_read_caps(struct rte_pci_device *dev, struc= t virtio_hw *hw) >> } >>=20 >> ret =3D rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST); >> - if (ret < 0) { >> - PMD_INIT_LOG(DEBUG, "failed to read pci capability list"); >> + if (ret !=3D 1) { >> + PMD_INIT_LOG(DEBUG, >> + "failed to read pci capability list, ret %d", ret); >> return -1; >> } >>=20 >> while (pos) { >> - ret =3D rte_pci_read_config(dev, &cap, sizeof(cap), pos); >> - if (ret < 0) { >> - PMD_INIT_LOG(ERR, >> - "failed to read pci cap at pos: %x", pos); >> + ret =3D rte_pci_read_config(dev, &cap, 2, pos); >> + if (ret !=3D 2) { >> + PMD_INIT_LOG(DEBUG, >> + "failed to read pci cap at pos: %x ret %d", >> + pos, ret); >> break; >> } >>=20 >> @@ -615,7 +617,16 @@ virtio_read_caps(struct rte_pci_device *dev, struct= virtio_hw *hw) >> * 1st byte is cap ID; 2nd byte is the position of next >> * cap; next two bytes are the flags. >> */ >> - uint16_t flags =3D ((uint16_t *)&cap)[1]; >> + uint16_t flags; >> + >> + ret =3D rte_pci_read_config(dev, &flags, sizeof(flags), >> + pos + 2); >> + if (ret !=3D sizeof(flags)) { >> + PMD_INIT_LOG(DEBUG, >> + "failed to read pci cap at pos:" >> + " %x ret %d", pos + 2, ret); >> + break; >> + } >>=20 >> if (flags & PCI_MSIX_ENABLE) >> hw->use_msix =3D VIRTIO_MSIX_ENABLED; >> @@ -630,6 +641,14 @@ virtio_read_caps(struct rte_pci_device *dev, struct= virtio_hw *hw) >> goto next; >> } >>=20 >> + ret =3D rte_pci_read_config(dev, &cap, sizeof(cap), pos); >> + if (ret !=3D sizeof(cap)) { >> + PMD_INIT_LOG(DEBUG, >> + "failed to read pci cap at pos: %x ret %d", >> + pos, ret); >> + break; >> + } >> + >> PMD_INIT_LOG(DEBUG, >> "[%2x] cfg type: %u, bar: %u, offset: %04x, len: %u", >> pos, cap.cfg_type, cap.bar, cap.offset, cap.length); >> @@ -718,25 +737,37 @@ enum virtio_msix_status >> vtpci_msix_detect(struct rte_pci_device *dev) >> { >> uint8_t pos; >> - struct virtio_pci_cap cap; >> int ret; >>=20 >> ret =3D rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST); >> - if (ret < 0) { >> - PMD_INIT_LOG(DEBUG, "failed to read pci capability list"); >> + if (ret !=3D 1) { >> + PMD_INIT_LOG(DEBUG, >> + "failed to read pci capability list, ret %d", ret); >> return VIRTIO_MSIX_NONE; >> } >>=20 >> while (pos) { >> - ret =3D rte_pci_read_config(dev, &cap, sizeof(cap), pos); >> - if (ret < 0) { >> - PMD_INIT_LOG(ERR, >> - "failed to read pci cap at pos: %x", pos); >> + uint8_t cap[2]; >> + >> + ret =3D rte_pci_read_config(dev, cap, sizeof(cap), pos); >> + if (ret !=3D sizeof(cap)) { >> + PMD_INIT_LOG(DEBUG, >> + "failed to read pci cap at pos: %x ret %d", >> + pos, ret); >> break; >> } >>=20 >> - if (cap.cap_vndr =3D=3D PCI_CAP_ID_MSIX) { >> - uint16_t flags =3D ((uint16_t *)&cap)[1]; >> + if (cap[0] =3D=3D PCI_CAP_ID_MSIX) { >> + uint16_t flags; >> + >> + ret =3D rte_pci_read_config(dev, &flags, sizeof(flags), >> + pos + sizeof(cap)); >> + if (ret !=3D sizeof(flags)) { >> + PMD_INIT_LOG(DEBUG, >> + "failed to read pci cap at pos:" >> + " %x ret %d", pos + 2, ret); >> + break; >> + } >>=20 >> if (flags & PCI_MSIX_ENABLE) >> return VIRTIO_MSIX_ENABLED; >> @@ -744,7 +775,7 @@ vtpci_msix_detect(struct rte_pci_device *dev) >> return VIRTIO_MSIX_DISABLED; >> } >>=20 >> - pos =3D cap.cap_next; >> + pos =3D cap[1]; >> } >>=20 >> return VIRTIO_MSIX_NONE; >> --=20 >> 2.11.0 >>=20 >> --- >> Diff of the applied patch vs upstream commit (please double-check if no= n-empty: >> --- >> --- - 2018-11-29 15:01:48.971545454 -0800 >> +++ 0085-net-virtio-fix-PCI-config-error-handling.patch 2018-11-29 15:01= :45.234959000 -0800 >> @@ -1,15 +1,16 @@ >> -From 49bb1f7a0ab760a0f1fb39e27c90a1cb2ad42edd Mon Sep 17 00:00:00 2001 >> +From b5196f660ce80df58babdd718f26ff980a841513 Mon Sep 17 00:00:00 2001 >> From: Brian Russell >> Date: Tue, 28 Aug 2018 11:12:40 +0100 >> Subject: [PATCH] net/virtio: fix PCI config error handling >>=20 >> +[ upstream commit 49bb1f7a0ab760a0f1fb39e27c90a1cb2ad42edd ] >> + >> In virtio_read_caps and vtpci_msix_detect, rte_pci_read_config returns >> the number of bytes read from PCI config or < 0 on error. >> If less than the expected number of bytes are read then log the >> failure and return rather than carrying on with garbage. >>=20 >> Fixes: 6ba1f63b5ab0 ("virtio: support specification 1.0") >> -Cc: stable@dpdk.org >>=20 >> Signed-off-by: Brian Russell >> Signed-off-by: Luca Boccassi >> @@ -19,10 +20,10 @@ >> 1 file changed, 48 insertions(+), 17 deletions(-) >>=20 >> diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio= _pci.c >> -index 6bd22e54a..b6a3c80b4 100644 >> +index 9574498fb..89986c335 100644 >> --- a/drivers/net/virtio/virtio_pci.c >> +++ b/drivers/net/virtio/virtio_pci.c >> -@@ -567,16 +567,18 @@ virtio_read_caps(struct rte_pci_device *dev, stru= ct virtio_hw *hw) >> +@@ -596,16 +596,18 @@ virtio_read_caps(struct rte_pci_device *dev, stru= ct virtio_hw *hw) >> } >>=20 >> ret =3D rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST); >> @@ -47,7 +48,7 @@ >> break; >> } >>=20 >> -@@ -586,7 +588,16 @@ virtio_read_caps(struct rte_pci_device *dev, struc= t virtio_hw *hw) >> +@@ -615,7 +617,16 @@ virtio_read_caps(struct rte_pci_device *dev, struc= t virtio_hw *hw) >> * 1st byte is cap ID; 2nd byte is the position of next >> * cap; next two bytes are the flags. >> */ >> @@ -65,7 +66,7 @@ >>=20 >> if (flags & PCI_MSIX_ENABLE) >> hw->use_msix =3D VIRTIO_MSIX_ENABLED; >> -@@ -601,6 +612,14 @@ virtio_read_caps(struct rte_pci_device *dev, struc= t virtio_hw *hw) >> +@@ -630,6 +641,14 @@ virtio_read_caps(struct rte_pci_device *dev, struc= t virtio_hw *hw) >> goto next; >> } >>=20 >> @@ -80,7 +81,7 @@ >> PMD_INIT_LOG(DEBUG, >> "[%2x] cfg type: %u, bar: %u, offset: %04x, len: %u", >> pos, cap.cfg_type, cap.bar, cap.offset, cap.length); >> -@@ -689,25 +708,37 @@ enum virtio_msix_status >> +@@ -718,25 +737,37 @@ enum virtio_msix_status >> vtpci_msix_detect(struct rte_pci_device *dev) >> { >> uint8_t pos; >> @@ -127,7 +128,7 @@ >>=20 >> if (flags & PCI_MSIX_ENABLE) >> return VIRTIO_MSIX_ENABLED; >> -@@ -715,7 +746,7 @@ vtpci_msix_detect(struct rte_pci_device *dev) >> +@@ -744,7 +775,7 @@ vtpci_msix_detect(struct rte_pci_device *dev) >> return VIRTIO_MSIX_DISABLED; >> } >>=20