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From: Matan Azrad <matan@mellanox.com>
To: Slava Ovsiienko <viacheslavo@mellanox.com>,
	"dev@dpdk.org" <dev@dpdk.org>
Cc: Raslan Darawsheh <rasland@mellanox.com>,
	Ori Kam <orika@mellanox.com>, "stable@dpdk.org" <stable@dpdk.org>
Subject: Re: [dpdk-stable] [PATCH] net/mlx5: fix matcher metadata register c0 field setup
Date: Mon, 6 Jan 2020 14:50:28 +0000
Message-ID: <AM0PR0502MB4019B68DC6B27326DAD741AED23C0@AM0PR0502MB4019.eurprd05.prod.outlook.com> (raw)
In-Reply-To: <1576828138-13063-1-git-send-email-viacheslavo@mellanox.com>



From: Viacheslav Ovsiienko
> The metadata register c0 field in the matcher might be split into two
> independent fields - the source vport index and META item value. These
> fields have no permanent assigned bits, the configuration is queried from the
> kernel drivers.
> 
> MLX5_SET configures the specified 32-bit field as whole entity.
> For metadata register c0 we should take into account the provided mask in
> order to configure the specified subfield bits only.
> 
> Fixes: acfcd5c52f94 ("net/mlx5: update meta register matcher set")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> ---
>  drivers/net/mlx5/mlx5_flow_dv.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_flow_dv.c
> b/drivers/net/mlx5/mlx5_flow_dv.c index 4c16281..893db3e 100644
> --- a/drivers/net/mlx5/mlx5_flow_dv.c
> +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> @@ -5742,6 +5742,7 @@ struct field_modify_info modify_tcp[] = {
>  		MLX5_ADDR_OF(fte_match_param, matcher,
> misc_parameters_2);
>  	void *misc2_v =
>  		MLX5_ADDR_OF(fte_match_param, key,
> misc_parameters_2);
> +	uint32_t temp;
> 
>  	data &= mask;
>  	switch (reg_type) {
> @@ -5754,8 +5755,18 @@ struct field_modify_info modify_tcp[] = {
>  		MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b,
> data);
>  		break;
>  	case REG_C_0:
> -		MLX5_SET(fte_match_set_misc2, misc2_m,
> metadata_reg_c_0, mask);
> -		MLX5_SET(fte_match_set_misc2, misc2_v,
> metadata_reg_c_0, data);
> +		/*
> +		 * The metadata register C0 field might be divided into
> +		 * source vport index and META item value, we should set
> +		 * this field accorfing to specified mask, not as whole one.
> +		 */

Typo - accorfing => according.

> +		temp = MLX5_GET(fte_match_set_misc2, misc2_m,
> metadata_reg_c_0);
> +		temp |= mask;
> +		MLX5_SET(fte_match_set_misc2, misc2_m,
> metadata_reg_c_0, temp);
> +		temp = MLX5_GET(fte_match_set_misc2, misc2_v,
> metadata_reg_c_0);
> +		temp &= ~mask;
> +		temp |= data;
> +		MLX5_SET(fte_match_set_misc2, misc2_v,
> metadata_reg_c_0, temp);
>  		break;
>  	case REG_C_1:
>  		MLX5_SET(fte_match_set_misc2, misc2_m,
> metadata_reg_c_1, mask);

Raslan, please fix the typo in integration.
Acked-by: Matan Azrad <matan@mellanox.com>



  reply	other threads:[~2020-01-06 14:50 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-20  7:48 Viacheslav Ovsiienko
2020-01-06 14:50 ` Matan Azrad [this message]
2020-01-07 11:31   ` Raslan Darawsheh
2020-01-08 14:47 ` Ferruh Yigit
2020-01-17 15:04   ` Slava Ovsiienko
2020-01-17 11:01 ` [dpdk-stable] [PATCH v2] net/mlx5: fix shared metadata matcher " Viacheslav Ovsiienko
2020-01-17 17:18   ` Ferruh Yigit

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