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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(396003)(39860400002)(346002)(376002)(136003)(36840700001)(46966006)(52536014)(70586007)(478600001)(83380400001)(7696005)(33656002)(81166007)(316002)(6506007)(336012)(6862004)(54906003)(450100002)(4326008)(55016002)(186003)(8936002)(47076005)(82310400003)(82740400003)(9686003)(53546011)(2906002)(8676002)(5660300002)(70206006)(86362001)(356005)(36860700001)(26005); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Apr 2021 05:16:41.1231 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c6ec12c3-7017-40a1-2d41-08d8fa4d7e65 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT046.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB6588 Subject: Re: [dpdk-stable] [dpdk-dev] [PATCH v3 3/3] test/power: add delay before checking cpuinfo cur freq X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi Liang, Sorry that last email contains "confidential notice", so I resend it. > -----Original Message----- > From: Liang Ma > Sent: Wednesday, April 7, 2021 6:15 PM > To: Richael Zhuang > Cc: dev@dpdk.org; alan.carew@intel.com; stable@dpdk.org; David Hunt > ; Pablo de Lara > Subject: Re: [dpdk-dev] [PATCH v3 3/3] test/power: add delay before > checking cpuinfo cur freq > On Wed, Apr 07, 2021 at 03:46:36PM +0800, Richael Zhuang wrote: > > Sleep for 1s before checking the newly updated value from > > "/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_cur_freq", because for > > some systems it may not be effective immediately. > > > > Fixes: ed7c51a6a680 ("app/test: vm power management") > > Cc: alan.carew@intel.com > > Cc: stable@dpdk.org > > > > Signed-off-by: Richael Zhuang > > --- > > app/test/test_power_cpufreq.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/app/test/test_power_cpufreq.c > > b/app/test/test_power_cpufreq.c index cda74bd8a..7a93bc90a 100644 > > --- a/app/test/test_power_cpufreq.c > > +++ b/app/test/test_power_cpufreq.c > > @@ -47,6 +47,9 @@ static uint32_t > freqs[TEST_POWER_FREQS_NUM_MAX]; > > static int check_cur_freq(unsigned lcore_id, uint32_t idx) { > > +/* wait for the value to be updated */ > > +sleep(1); > Hi Richael, > 1 second looks way too much for CPU frequency swap. > The unit should be ms in the worst case regardless the vendor, IMO. > Regards > Liang Thanks for review. Although I also think this time seems too long, it needs more than 700ms when I tested on our arm platform. > > + > > #define TEST_POWER_CONVERT_TO_DECIMAL 10 > > FILE *f; > > char fullpath[PATH_MAX]; > > -- > > 2.20.1 > > IMPORTANT NOTICE: The contents of this email and any attachments are confid= ential and may also be privileged. If you are not the intended recipient, p= lease notify the sender immediately and do not disclose the contents to any= other person, use it for any purpose, or store or copy the information in = any medium. Thank you.