From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B00E3A0521 for ; Fri, 24 Jul 2020 10:37:41 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 86C161C02C; Fri, 24 Jul 2020 10:37:41 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 1AC9EE07; Fri, 24 Jul 2020 10:37:37 +0200 (CEST) IronPort-SDR: Saj5kVB0kZKmr4RPjqB5ekVJztIEblh/T37xhooDWF7N8umQuCqmM62wEERe4MshnTIc6vH3Yk nQbMitK5IPsA== X-IronPort-AV: E=McAfee;i="6000,8403,9691"; a="212211459" X-IronPort-AV: E=Sophos;i="5.75,390,1589266800"; d="scan'208";a="212211459" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jul 2020 01:37:36 -0700 IronPort-SDR: uLP51+kUQBOsSbXwR9cMNHdTRdeuAkP5IZNjry20IG4zhD7kfwg2IH+cJp6Gfb/7e1v6VW24Qc Mtz0EGyWGJ+g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,390,1589266800"; d="scan'208";a="311332840" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga004.fm.intel.com with ESMTP; 24 Jul 2020 01:37:36 -0700 Received: from fmsmsx111.amr.corp.intel.com (10.18.116.5) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 24 Jul 2020 01:37:36 -0700 Received: from FMSEDG002.ED.cps.intel.com (10.1.192.134) by fmsmsx111.amr.corp.intel.com (10.18.116.5) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 24 Jul 2020 01:37:36 -0700 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (104.47.55.100) by edgegateway.intel.com (192.55.55.69) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 24 Jul 2020 01:37:36 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=lXYIJ9Y4hTArByNLqtM+IKeGhO0sn/cE4IA9jPCyszyX/W5P3XnPhEVw2aflHleR/hjXhWAIJu15BoMqFgqCbiJxrsP5VlTk33PAzvG0xCkxmDJJdONhRVcBHb9NbTn9gnsv0wUReqsRDURjngtJ9EJpvF9YpnT/qiac2tqct3SqRlTHUOkW4ZqTXWFnXQZghim+xUS8yPu8b4N4AaHYai4DqnkgJsoTYqIToiKfwJBV4v/hvbXJDN20XXfQZJrkO8QrQtpqtYM9SGwn0Pw3wBPZZmMBjPJY0d2bRKnIvhghC8oglL8v1T3gW5upfVFqUVqco7og7o+YhDuedSEEPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=7+8QBboRrmu3t/WnUCd84Z0gv2YGw7gxyDePJy6GuQs=; b=jKV1j/2+ooPtjinW1xmbKRE343cra6qUuUaW53T6s0XJ+xHACjVtBx485I7AmzWAdbL0edbOSIEZscKvzuymAFsKjvqDq5HOO/APhayGd17odnOGnmkTNQQ5Ok4J/gfhK9Ham9A/VFxQd9P1uU5NX1NmyUyhoPsDdmm8E9NUvEZ0AnVlv4Lx9gh6Bfq65YjEmlmIgMzpYpKfIU3oxVY5uV3Cjq/wrF/GQs2yif2v2oFIO299ZxPnWhRWkI0n1O94KZ2jy5Nan3AEK3ZAC4nSTwuvuUh9Xbumuxx5RTmWO3aeNkpxHjvGi6nL/wXttqdVy8t2wWSDrciMLUD9pf5vew== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel.onmicrosoft.com; s=selector2-intel-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=7+8QBboRrmu3t/WnUCd84Z0gv2YGw7gxyDePJy6GuQs=; b=nCsCYccExW9lCRPkXHL819lQtxxxNRQRGBfc/bPww64EklFKIDymDHBWSRvmowxZ33KUYcsK9gr8CarL8PA5qsVtGxgmU4KFWQjzvB0a90CGZrF/ttmEvBdp+/8Q//n/BQtCuf0neU5mwiCfPU+zBeevqvtdI4nym1OUZAj6aNw= Received: from BN6PR11MB0017.namprd11.prod.outlook.com (2603:10b6:405:6c::34) by BN6PR11MB4178.namprd11.prod.outlook.com (2603:10b6:405:84::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3216.22; Fri, 24 Jul 2020 08:37:34 +0000 Received: from BN6PR11MB0017.namprd11.prod.outlook.com ([fe80::c8eb:f4c9:5b58:3120]) by BN6PR11MB0017.namprd11.prod.outlook.com ([fe80::c8eb:f4c9:5b58:3120%6]) with mapi id 15.20.3195.028; Fri, 24 Jul 2020 08:37:33 +0000 From: "Yang, Qiming" To: "Zhao1, Wei" , "dev@dpdk.org" CC: "stable@dpdk.org" , "Zhang, Qi Z" , "Zhao1, Wei" Thread-Topic: [dpdk-dev] [PATCH] net/i40e: enable i40e outer VLAN strip in QinQ Thread-Index: AQHWYYwDcqJr2x5MI02lDaPmXUdEOKkWaAHA Date: Fri, 24 Jul 2020 08:37:33 +0000 Message-ID: References: <20200724070137.10003-1-wei.zhao1@intel.com> In-Reply-To: <20200724070137.10003-1-wei.zhao1@intel.com> Accept-Language: en-US, zh-CN Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.102.204.45] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: a83ff0d9-1e3c-4a03-b204-08d82faccfb9 x-ms-traffictypediagnostic: BN6PR11MB4178: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:4502; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: ALssAnL/AWTSFjUEQmnXH8q50uLf1qXnMORdsXGQZOvyVL1dHTlrj/EsGN7gKTgGYj1orlGwrgBb0nDWb+1jS5oTkSQWxM6xovpQ7XmGIpQeF3WMDSn9Y/sMen0Jc12GQQjAQlZtuegG0Y7A+e+kxhF8TNmrjzflVVHlsfd8CpIBuJn6KIp2A4OGPq3XAlPIjbbvgYbRcBghd3XgvRF6HLm3wZrVK1PNwKTxxNl+L7PLAguH4niyCixMUsKQnyVvSNdl6t8aq7CVPZZCpznbkTVgrYpY7uKHOXRIPZosgAjNaJ2KzwZcvd9Rs2pEIsTC x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:BN6PR11MB0017.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(4636009)(136003)(366004)(346002)(376002)(39860400002)(396003)(66446008)(76116006)(2906002)(64756008)(107886003)(7696005)(316002)(71200400001)(66946007)(8936002)(66556008)(66476007)(110136005)(54906003)(86362001)(26005)(8676002)(6506007)(53546011)(186003)(478600001)(9686003)(5660300002)(4326008)(450100002)(52536014)(83380400001)(33656002)(55016002); DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata: ZDIxhuB91J19NjBZnJ4aZkghipzYyTkWzz0EXQyBE8GHQJwmdztMQXmkCfhBGAVzySEsKctgciXKMd1Rb3TIyXPbCnOu216k/iYk5FPrbGdzLNrP1uIC8IGq+CvInmI4xn9Jax0X93VJrWZd4qu9NYCrGXVZhp45fujwT2t/GhG6ZwP9B34UAQah/YxiJw0Wo1u+cTSyXc3U6t/YLdMdj+cBLeRCs8wXqcFK4iWnfyzUPmL5yxXXh7yRBVErcA7xFVYdlaah8Qtnf9JcB0xnrnW41v4qKzPonwiZX3PHV6EqYBCqGsnI1TBGsdhlKTuGYoXq4ARdztow7cUXAzk8pFj3vkVucLbQrPCPxE/owvqqplyt2EOD2LMjACsFdYmdjiB8CIDEgLLmM9+orgt6g8POZqusDYWAOdFpmO6XU5tuXykSUq2wy16Q8r41S3fcpR/5kzxChKLs72CF4nO7a9btN4YySU0AramUngT3Fp2s6AauxNuD3+/mp3TaFu8I Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN6PR11MB0017.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a83ff0d9-1e3c-4a03-b204-08d82faccfb9 X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Jul 2020 08:37:33.6340 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 41D1YLZQstphwA0ZPn1aayRzkBbs+qJ+FgCEFTKzbliWC+aaN3vgB3vRLq/Qu2x73V+imMeEuIGeJpD/oEWoVQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR11MB4178 X-OriginatorOrg: intel.com Subject: Re: [dpdk-stable] [dpdk-dev] [PATCH] net/i40e: enable i40e outer VLAN strip in QinQ X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" > -----Original Message----- > From: dev On Behalf Of Wei Zhao > Sent: Friday, July 24, 2020 15:02 > To: dev@dpdk.org > Cc: stable@dpdk.org; Zhang, Qi Z ; Zhao1, Wei > > Subject: [dpdk-dev] [PATCH] net/i40e: enable i40e outer VLAN strip in Qin= Q >=20 > This patch enable i40e outer vlan strip on and off in QinQ mode with mask= bit > of DEV_RX_OFFLOAD_QINQ_STRIP, users can use "vlan set qinq_strip on 0" > to enable or "vlan set qinq_strip on 0" to disable i40e outer vlan strip = when > try with testpmd app. >=20 > Fixes: 4861cde46116 (i40e: new poll mode driver) >=20 > Signed-off-by: Wei Zhao > --- > drivers/net/i40e/i40e_ethdev.c | 45 > +++++++++++++++++++++++++++++++++- > 1 file changed, 44 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethde= v.c > index 05d5f2861..f5be6606c 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -48,6 +48,8 @@ > #define ETH_I40E_VF_MSG_CFG "vf_msg_cfg" >=20 > #define I40E_CLEAR_PXE_WAIT_MS 200 > +#define I40E_VSI_TSR_QINQ_STRIP 0x4010 > +#define I40E_VSI_TSR(_i) (0x00050800 + ((_i) * 4)) >=20 > /* Maximun number of capability elements */ > #define I40E_MAX_CAP_ELE_NUM 128 > @@ -3968,6 +3970,39 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev, > return ret; > } >=20 > +/* Configure outer vlan stripping on or off in QinQ mode */ static int > +i40e_vsi_config_outer_vlan_stripping(struct i40e_vsi *vsi, bool on) { > + struct i40e_hw *hw =3D I40E_VSI_TO_HW(vsi); > + int ret =3D I40E_SUCCESS; > + uint32_t reg; > + > + if (vsi->vsi_id >=3D I40E_MAX_NUM_VSIS) { > + PMD_DRV_LOG(ERR, "VSI ID exceeds the maximum"); > + return -EINVAL; > + } > + > + /* Configure for outer VLAN RX stripping */ > + reg =3D I40E_READ_REG(hw, I40E_VSI_TSR(vsi->vsi_id)); > + > + if (on) > + reg |=3D I40E_VSI_TSR_QINQ_STRIP; > + else > + reg &=3D ~I40E_VSI_TSR_QINQ_STRIP; > + > + ret =3D i40e_aq_debug_write_register(hw, > + I40E_VSI_TSR(vsi->vsi_id), > + reg, NULL); > + if (ret < 0) { > + PMD_DRV_LOG(ERR, "Failed to update VSI_TSR[%d]", > + vsi->vsi_id); > + return I40E_ERR_CONFIG; > + } > + > + return ret; > +} > + > static int > i40e_vlan_offload_set(struct rte_eth_dev *dev, int mask) { @@ -4004,6 > +4039,14 @@ i40e_vlan_offload_set(struct rte_eth_dev *dev, int mask) > i40e_vsi_config_double_vlan(vsi, FALSE); > } >=20 > + if (mask & ETH_QINQ_STRIP_MASK) { > + /* Enable or disable outer VLAN stripping */ > + if (rxmode->offloads & DEV_RX_OFFLOAD_QINQ_STRIP) > + i40e_vsi_config_outer_vlan_stripping(vsi, TRUE); > + else > + i40e_vsi_config_outer_vlan_stripping(vsi, FALSE); > + } > + > return 0; > } >=20 > @@ -6178,6 +6221,7 @@ i40e_dev_init_vlan(struct rte_eth_dev *dev) >=20 > /* Apply vlan offload setting */ > mask =3D ETH_VLAN_STRIP_MASK | > + ETH_QINQ_STRIP_MASK | > ETH_VLAN_FILTER_MASK | > ETH_VLAN_EXTEND_MASK; > ret =3D i40e_vlan_offload_set(dev, mask); @@ -10872,7 +10916,6 @@ > i40e_configure_registers(struct i40e_hw *hw) > } > } >=20 > -#define I40E_VSI_TSR(_i) (0x00050800 + ((_i) * 4)) > #define I40E_VSI_TSR_QINQ_CONFIG 0xc030 > #define I40E_VSI_L2TAGSTXVALID(_i) (0x00042800 + ((_i) * 4)) #define > I40E_VSI_L2TAGSTXVALID_QINQ 0xab > -- > 2.19.1 Reviewed-by: Qiming Yang