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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BY5PR12MB4324.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 82441a5f-8025-4f77-1e4d-08d91900f228 X-MS-Exchange-CrossTenant-originalarrivaltime: 17 May 2021 06:56:50.1144 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: HGk0l2bj+xw8lrx/fEAnmvuygjkc0FzKjSIyeTBh4dIxfWKnb1dZ0P6lHWLwqyNQ6itegbiKUZCQW7gYVRya6A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB3761 Subject: Re: [dpdk-stable] [PATCH 20.11] net/hns3: fix mbuf leakage X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" > -----Original Message----- > From: Min Hu (Connor) > Sent: Saturday, May 15, 2021 5:07 PM > To: stable@dpdk.org > Cc: ferruh.yigit@intel.com; Xueming(Steven) Li > Subject: [PATCH 20.11] net/hns3: fix mbuf leakage >=20 > From: Huisong Li >=20 > [ upstream commit fdfde7a4a0f8be8f79c82ee91da9041acd64a798 ] >=20 > The mbufs of rx queue will be allocated in "hns3_do_start" function. > But these mbufs are not released when "hns3_dev_start" executes failed. >=20 > Fixes: c4ae39b2cfc5 ("net/hns3: fix Rx interrupt after reset") > Cc: stable@dpdk.org >=20 > Signed-off-by: Huisong Li > Signed-off-by: Lijun Ou > --- > drivers/net/hns3/hns3_ethdev.c | 44 ++++++++++++++++++++++++---------= ------ > drivers/net/hns3/hns3_ethdev_vf.c | 43 +++++++++++++++++++++++----------= ----- > 2 files changed, 53 insertions(+), 34 deletions(-) >=20 > diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethde= v.c index ba7d6e3..123d2bf 100644 > --- a/drivers/net/hns3/hns3_ethdev.c > +++ b/drivers/net/hns3/hns3_ethdev.c > @@ -101,6 +101,7 @@ static int hns3_remove_mc_addr(struct hns3_hw *hw, > struct rte_ether_addr *mac_addr); static int hns3_restore_fec(st= ruct hns3_hw *hw); static int > hns3_query_dev_fec_info(struct hns3_hw *hw); > +static int hns3_do_stop(struct hns3_adapter *hns); >=20 > static void > hns3_pf_disable_irq0(struct hns3_hw *hw) @@ -4943,11 +4944,8 @@ hns3_dev= _start(struct rte_eth_dev *dev) > return ret; > } > ret =3D hns3_map_rx_interrupt(dev); > - if (ret) { > - hw->adapter_state =3D HNS3_NIC_CONFIGURED; > - rte_spinlock_unlock(&hw->lock); > - return ret; > - } > + if (ret) > + goto map_rx_inter_err; >=20 > /* > * There are three register used to control the status of a TQP @@ -496= 1,19 +4959,12 @@ hns3_dev_start(struct rte_eth_dev > *dev) > * status of queue in the dpdk framework. > */ > ret =3D hns3_start_all_txqs(dev); > - if (ret) { > - hw->adapter_state =3D HNS3_NIC_CONFIGURED; > - rte_spinlock_unlock(&hw->lock); > - return ret; > - } > + if (ret) > + goto map_rx_inter_err; >=20 > ret =3D hns3_start_all_rxqs(dev); > - if (ret) { > - hns3_stop_all_txqs(dev); > - hw->adapter_state =3D HNS3_NIC_CONFIGURED; > - rte_spinlock_unlock(&hw->lock); > - return ret; > - } > + if (ret) > + goto start_all_rxqs_fail; >=20 > hw->adapter_state =3D HNS3_NIC_STARTED; > rte_spinlock_unlock(&hw->lock); > @@ -4996,6 +4987,15 @@ hns3_dev_start(struct rte_eth_dev *dev) >=20 > hns3_info(hw, "hns3 dev start successful!"); > return 0; > + > +start_all_rxqs_fail: > + hns3_stop_all_txqs(dev); > +map_rx_inter_err: > + (void)hns3_do_stop(hns); > + hw->adapter_state =3D HNS3_NIC_CONFIGURED; > + rte_spinlock_unlock(&hw->lock); > + > + return ret; > } >=20 > static int > @@ -5004,6 +5004,17 @@ hns3_do_stop(struct hns3_adapter *hns) > struct hns3_hw *hw =3D &hns->hw; > int ret; >=20 > + /* > + * The "hns3_do_stop" function will also be called by .stop_service to > + * prepare reset. At the time of global or IMP reset, the command canno= t > + * be sent to stop the tx/rx queues. The mbuf in Tx/Rx queues may be > + * accessed during the reset process. So the mbuf can not be released > + * during reset and is required to be released after the reset is > + * completed. > + */ > + if (rte_atomic16_read(&hw->reset.resetting) =3D=3D 0) > + hns3_dev_release_mbufs(hns); > + > ret =3D hns3_cfg_mac_mode(hw, false); > if (ret) > return ret; > @@ -5080,7 +5091,6 @@ hns3_dev_stop(struct rte_eth_dev *dev) > hns3_stop_tqps(hw); > hns3_do_stop(hns); > hns3_unmap_rx_interrupt(dev); > - hns3_dev_release_mbufs(hns); > hw->adapter_state =3D HNS3_NIC_CONFIGURED; > } > hns3_rx_scattered_reset(dev); > diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_et= hdev_vf.c > index 9c84740..52ad825 100644 > --- a/drivers/net/hns3/hns3_ethdev_vf.c > +++ b/drivers/net/hns3/hns3_ethdev_vf.c > @@ -1912,6 +1912,17 @@ hns3vf_do_stop(struct hns3_adapter *hns) >=20 > hw->mac.link_status =3D ETH_LINK_DOWN; >=20 > + /* > + * The "hns3vf_do_stop" function will also be called by .stop_service t= o > + * prepare reset. At the time of global or IMP reset, the command canno= t > + * be sent to stop the tx/rx queues. The mbuf in Tx/Rx queues may be > + * accessed during the reset process. So the mbuf can not be released > + * during reset and is required to be released after the reset is > + * completed. > + */ > + if (rte_atomic16_read(&hw->reset.resetting) =3D=3D 0) > + hns3_dev_release_mbufs(hns); > + > if (rte_atomic16_read(&hw->reset.disable_cmd) =3D=3D 0) { > hns3vf_configure_mac_addr(hns, true); > ret =3D hns3_reset_all_tqps(hns); > @@ -1981,7 +1992,6 @@ hns3vf_dev_stop(struct rte_eth_dev *dev) > hns3_stop_tqps(hw); > hns3vf_do_stop(hns); > hns3vf_unmap_rx_interrupt(dev); > - hns3_dev_release_mbufs(hns); > hw->adapter_state =3D HNS3_NIC_CONFIGURED; > } > hns3_rx_scattered_reset(dev); > @@ -2223,11 +2233,8 @@ hns3vf_dev_start(struct rte_eth_dev *dev) > return ret; > } > ret =3D hns3vf_map_rx_interrupt(dev); > - if (ret) { > - hw->adapter_state =3D HNS3_NIC_CONFIGURED; > - rte_spinlock_unlock(&hw->lock); > - return ret; > - } > + if (ret) > + goto map_rx_inter_err; >=20 > /* > * There are three register used to control the status of a TQP @@ -224= 1,19 +2248,12 @@ hns3vf_dev_start(struct > rte_eth_dev *dev) > * status of queue in the dpdk framework. > */ > ret =3D hns3_start_all_txqs(dev); > - if (ret) { > - hw->adapter_state =3D HNS3_NIC_CONFIGURED; > - rte_spinlock_unlock(&hw->lock); > - return ret; > - } > + if (ret) > + goto map_rx_inter_err; >=20 > ret =3D hns3_start_all_rxqs(dev); > - if (ret) { > - hns3_stop_all_txqs(dev); > - hw->adapter_state =3D HNS3_NIC_CONFIGURED; > - rte_spinlock_unlock(&hw->lock); > - return ret; > - } > + if (ret) > + goto start_all_rxqs_fail; >=20 > hw->adapter_state =3D HNS3_NIC_STARTED; > rte_spinlock_unlock(&hw->lock); > @@ -2275,6 +2275,15 @@ hns3vf_dev_start(struct rte_eth_dev *dev) > hns3_start_tqps(hw); >=20 > return ret; > + > +start_all_rxqs_fail: > + hns3_stop_all_txqs(dev); > +map_rx_inter_err: > + (void)hns3vf_do_stop(hns); > + hw->adapter_state =3D HNS3_NIC_CONFIGURED; > + rte_spinlock_unlock(&hw->lock); > + > + return ret; > } >=20 > static bool > -- > 2.7.4 Hi Min, Thanks for backporting, merged. Best Regards, Xueming