From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C1840A09EF for ; Mon, 11 Jan 2021 12:12:43 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9CF8E140CC7; Mon, 11 Jan 2021 12:12:43 +0100 (CET) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id 2C592140CAF; Mon, 11 Jan 2021 12:12:40 +0100 (CET) IronPort-SDR: BWlX2jJa5JW3S9w1PA6PhJ/MAi9WVzp4LMu0I81SNYtU2TqZltvveS/hS2OL1PtFvD7hCA+FM1 ZSrbvvVgning== X-IronPort-AV: E=McAfee;i="6000,8403,9860"; a="177064769" X-IronPort-AV: E=Sophos;i="5.79,338,1602572400"; d="scan'208";a="177064769" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jan 2021 03:12:36 -0800 IronPort-SDR: HLTmjsTOo4u2zxABliEhPwa87ot3B2pRWoomI4RHqTCBpCSnr5lWUF8IFYfoGdvqZZBNw+plbx nk5Aj/tqTqdA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,338,1602572400"; d="scan'208";a="344858456" Received: from orsmsx605.amr.corp.intel.com ([10.22.229.18]) by fmsmga007.fm.intel.com with ESMTP; 11 Jan 2021 03:12:36 -0800 Received: from orsmsx604.amr.corp.intel.com (10.22.229.17) by ORSMSX605.amr.corp.intel.com (10.22.229.18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Mon, 11 Jan 2021 03:12:35 -0800 Received: from ORSEDG602.ED.cps.intel.com (10.7.248.7) by orsmsx604.amr.corp.intel.com (10.22.229.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5 via Frontend Transport; Mon, 11 Jan 2021 03:12:35 -0800 Received: from NAM12-BN8-obe.outbound.protection.outlook.com (104.47.55.170) by edgegateway.intel.com (134.134.137.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.1713.5; Mon, 11 Jan 2021 03:12:35 -0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=KXLCLNT/508st+zytZSRQ3xpnwIseDablgYUH8TWntjaLbBJbRXISeUVln7MTScVA1D/p6MdiTUc2zlny3ULhwNy2/4sA103H6XyfSBdgEz3hOQlX5whGXra7WfKf7VYfuLHKFol1lZ9BaVcsbSGp0GDpiRiUwtbIfgnfEbC3oa7/K5vlee5PAe9mI7ZtURwDBRuE2bUmNfgAKuMAcorbzCOqz0PrgamPtdhJVY9yBRrTPEGTNkjQJ56DvVZlpzi3sUEX2KtPh9wdI+scnfolr5EgdQk7gPyCiu+zfUCDcNZ0mCtnRVb8Y/rw3rCuhRcVQUTv292sq68m4GBD55ADw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=xzplAFoJz44EYj2lFZxsOERHFaY5NfbMLqETamcqJkE=; b=NdKarQ4tfMqTG0qdbHJOFwnvNeVNZfosoR0xKGu+Hg+xsKWHsCmdzRJvzvSbGfYpKEzLH5k4PrSEQY3ddxMYVQ8NbiBNrodKuoJDSD65h8UF83JvRdkew5akQAecsxLxMcVqBAP/76P1s41zN6NgPTcl+zsB4RxjaEoZnzZs5RsqKOAJ3rTS74flxbrQ9iAPtMzUh2JZRGBkQFaDdZvjLLA1T5GQzqPFQT+0jo/8XM0rHR65dXouu/20tY4yfR5hoJ7QHrbG97VhX9BCpKWSHC/Owb6SxIvRUeu5MJ2EedLrWkz/xTaWW+apFwKeCrx/a24N7W1VubFaNaHLo/XOVA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel.onmicrosoft.com; s=selector2-intel-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=xzplAFoJz44EYj2lFZxsOERHFaY5NfbMLqETamcqJkE=; b=CjGgAsHumUAQz/tAPIAhO5v3noCmAPQkoRZMmM1FO79GeQzKpucCug4tJeRR7xZu+szkPnA4smmdk0/ze2fD9V2Xi/blKI1NZhutaR3DMv+bbrg6nZHW45o39MzSSXs7oFpW+HHOyoshsnbVxRLNK0RjTL89bVcLqm3fUvlZ2vk= Received: from BYAPR11MB2901.namprd11.prod.outlook.com (2603:10b6:a03:91::23) by BYAPR11MB3623.namprd11.prod.outlook.com (2603:10b6:a03:b5::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3742.6; Mon, 11 Jan 2021 11:12:31 +0000 Received: from BYAPR11MB2901.namprd11.prod.outlook.com ([fe80::4946:fd9f:86f7:43f9]) by BYAPR11MB2901.namprd11.prod.outlook.com ([fe80::4946:fd9f:86f7:43f9%7]) with mapi id 15.20.3742.012; Mon, 11 Jan 2021 11:12:31 +0000 From: "Xu, Rosen" To: "Huang, Wei" , "dev@dpdk.org" , "Zhang, Qi Z" CC: "stable@dpdk.org" , "Zhang, Tianfei" Thread-Topic: [PATCH v8 4/4] examples/ifpga: add example for opae ifpga API Thread-Index: AQHW5aFTtSAK9Q2yfUWUQKn3C3O9YqoiSdpA Date: Mon, 11 Jan 2021 11:12:31 +0000 Message-ID: References: <1610098404-3687-1-git-send-email-wei.huang@intel.com> <1610098404-3687-5-git-send-email-wei.huang@intel.com> In-Reply-To: <1610098404-3687-5-git-send-email-wei.huang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.5.1.3 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMjYwNDlkOTQtNTcyZi00MDgzLTg1NjUtYzBiNzRlN2ZjNWI0IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoidFhlQjY5ZkNOUkp1N1FNWlVBY0hxS0VaYjZZSklVNHArTGpXeFpORWpcL2kweU0yWllkMGdaK2FORVZMdnVhcnEifQ== x-ctpclassification: CTP_NT authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.198.147.218] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: b12eea5f-aa0d-40e5-c82f-08d8b621ca35 x-ms-traffictypediagnostic: BYAPR11MB3623: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:1332; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: L6G1KnYsIwAri13bXTH6wEgmWSzsjntFagglt1vQoXgLQNTVbKpUPX7k3uSkUfsXWOd80XpSlIr+QdmLpSbrmEFM8aCZBu+BXHEEfEz0gh0egGUi0Kk1ve8oA/+qyCHQ+S8oJxeoTD17uw6o/srPDXzPdaezudfiuMVEv4I8ZlL0/vi1oe7LoVTnOk5Kv4wUEf4sGwE3hMCNHFITyg7xH6ykbx92ZN0th3Cig9dT3pt1DdjB1lJRuGUZqhG/wwpeYHsN1n6jyyRqGhtDVuuS0SnwUPMdJcPKN/ALyVneGfO5OhjBk/u/J8BTG+GFJ3yvhZeX/NYXCpDW3wqX+JPW539GRu4rOVnuK3myetPjXQnUUhU8Visx2/BTtzYXNupXrnQR4bU72U7ybe10lzsUqKH1LkhCKP8EOblNZyuHHeywnRZ8SKrRRrJIMAa6VIki x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:BYAPR11MB2901.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(376002)(39860400002)(346002)(136003)(396003)(366004)(8676002)(450100002)(83380400001)(8936002)(71200400001)(186003)(7696005)(2906002)(4326008)(316002)(54906003)(26005)(9686003)(66946007)(66446008)(76116006)(5660300002)(6506007)(64756008)(55016002)(66476007)(33656002)(66556008)(53546011)(30864003)(6636002)(86362001)(478600001)(107886003)(52536014)(110136005)(579004)(559001)(473944003); DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata: =?us-ascii?Q?M+eErnEwen0CaqbLBxFQgXJRXwUINH4KE2AlebX3udbuYbu2mG3YZqlwVhND?= =?us-ascii?Q?kkW/PLZ2xPMX39Jpw66QVtL8a094WEoq2jpzAIMbSqZ+Sy46MmH16kLlJTJT?= =?us-ascii?Q?0Cgd6V1OG6mUfHqs7H+G25NZd3xZw2wnd5X1FVxJiLXfAN3zTREMX4F/iAd6?= =?us-ascii?Q?OvTp+J8VO/gzbOHzhX6J/R9xeU0FzHr0lqNOKivsPsXqYpZsKgO/OfZGoJJ8?= =?us-ascii?Q?WfZad9npE1lsi+i+axfD1uLxlOBLKgAL8fX3pfr2t4fFW1cCvmnZ/q2ChyKi?= =?us-ascii?Q?T5zc1c+cjG7u+KJ4OvijnOLn0VEZE5qtWMmnNzgNO3ltGthd3GMCiUZ/s5Un?= =?us-ascii?Q?onk7o7vq/RGHj+CeJ1IZgpVRpIqELDIgpMLKkwZJxwk1l9a+o9Kn7vtGXdrd?= =?us-ascii?Q?bJtDsf2kzGtJEegVat5j65U6OVGUC7hEvdCJU2gNvPjCUwIvvb6uoJ6ZmR3B?= =?us-ascii?Q?HZphkmG5hI3xyHwaMu2ISB8aRLH6TOQaXaTVpXtln2++FV8Mq9glEYI/TmPC?= =?us-ascii?Q?bKiqcEaeMa5GH5CaO9jcx9LolcePmHOxSe4pomUYQNl4tEpGC28+TKu/sWRX?= =?us-ascii?Q?XuZh0pxgQ6YX2Vr4BbUcmlSA1cpniLZSHGn9E31GXj2ClirpqlQ+Pctop2bb?= =?us-ascii?Q?VqGDFICSJOCEip2MQ8G/0lsGMUu42wzWRGM7DuOkNBbOL04XDsnvAyVz3rXR?= =?us-ascii?Q?oKiX2E0QRh0E2nsVNpj2HlzAOiYEH5j1hxEXlUwwH+h7rna1uk6xl0LvYhru?= =?us-ascii?Q?B1mkDKXfoLXxcBuSHzHaxbimieHfb5H++/1gDPgGfgJtj9RhzbWE4zLhp6K1?= =?us-ascii?Q?8TF2L8ELv29invnQvDBIFOYqA+vI2DlDb/jJiCcdRjRXfJ9VpeP6ol6q2aHn?= =?us-ascii?Q?qsdkNm1z2BVNOLufmej4AGY8RLYcnHVrYscJrZqPUNGHKOjlG7/4ytq8Zdwq?= =?us-ascii?Q?0wHL0zpuK/9SfKQUGpw2rC1pzmmbhSV/BWTjx7lk4D0=3D?= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR11MB2901.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: b12eea5f-aa0d-40e5-c82f-08d8b621ca35 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Jan 2021 11:12:31.4384 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: cgZYx9aYW15WnU0hjA3Lhv1WMlE9ULVjvWCuugobuuMP2KweiV5MNF+9aUsIUpnx1rP3o95LJzjm5JwAoxqo1g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB3623 X-OriginatorOrg: intel.com Subject: Re: [dpdk-stable] [PATCH v8 4/4] examples/ifpga: add example for opae ifpga API X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi Wei, Pls check compilation issues of this patch. Thanks a lot. Thanks, Rosen > -----Original Message----- > From: Huang, Wei > Sent: Friday, January 08, 2021 17:33 > To: dev@dpdk.org; Xu, Rosen ; Zhang, Qi Z > > Cc: stable@dpdk.org; Zhang, Tianfei ; Huang, Wei > > Subject: [PATCH v8 4/4] examples/ifpga: add example for opae ifpga API >=20 > An example application shows how to use opae ifpga APIs. > You can test each API by running corresponding command. > A guide is also added to show how to run the example. >=20 > Signed-off-by: Wei Huang > --- > v2: fix coding style issue in commands.c > --- > v3: add guide for running example > --- > doc/guides/sample_app_ug/ifpga.rst | 433 +++++++++ > examples/ifpga/Makefile | 45 + > examples/ifpga/commands.c | 1321 ++++++++++++++++++++++++++++ > examples/ifpga/commands.h | 16 + > examples/ifpga/main.c | 38 + > examples/ifpga/meson.build | 19 + > 6 files changed, 1872 insertions(+) > create mode 100644 doc/guides/sample_app_ug/ifpga.rst > create mode 100644 examples/ifpga/Makefile > create mode 100644 examples/ifpga/commands.c > create mode 100644 examples/ifpga/commands.h > create mode 100644 examples/ifpga/main.c > create mode 100644 examples/ifpga/meson.build >=20 > diff --git a/doc/guides/sample_app_ug/ifpga.rst > b/doc/guides/sample_app_ug/ifpga.rst > new file mode 100644 > index 000000000..edefa5ea6 > --- /dev/null > +++ b/doc/guides/sample_app_ug/ifpga.rst > @@ -0,0 +1,433 @@ > +.. SPDX-License-Identifier: BSD-3-Clause > + Copyright(c) 2020-2021 Intel Corporation. > + > +Intel FPGA Sample Application > +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D > + > +The Intel FPGA sample application is an example of how to use OPAE API t= o > manage > +Intel FPGA. > + > +Overview > +-------- > + > +The Intel FPGA sample application is a simple application that demonstra= tes > +the use of the OPAE API provided by ifpga driver in the DPDK. > +This application is a readline-like interface that can be used to manage > +Intel FPGA, in a Linux* application environment. > + > +Compiling the Application > +------------------------- > + > +To compile the sample application see :doc:`compiling` > + > +The application is located in the ``ifpga`` sub-directory. > + > +Running the Application > +----------------------- > + > +To run the application in linux environment, issue the following command= : > + > +.. code-block:: console > + > + $ .//examples/dpdk-ifpga --proc-type=3Dauto > + > +Refer to the *DPDK Getting Started Guide* for general information on > running > +applications and the Environment Abstraction Layer (EAL) options. > + > +Explanation > +----------- > + > +The following sections provide some explanation of the code. > + > +EAL Initialization and cmdline Start > +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > + > +The first task is the initialization of the Environment Abstraction Laye= r (EAL). > +This is achieved as follows: > + > +.. code-block:: c > + > + int main(int argc, char **argv) > + { > + ret =3D opae_init_eal(argc, argv); > + if (ret < 0) > + rte_panic("Cannot init EAL\n"); > + > +Then, a new command line object is created and started to interact with = the > user > +through the console: > + > +.. code-block:: c > + > + cl =3D cmdline_stdin_new(main_ctx, "opae> "); > + if (cl =3D=3D NULL) > + rte_panic("Cannot create cmdline instance\n"); > + cmdline_interact(cl); > + opae_cleanup_eal(); > + cmdline_stdin_exit(cl); > + > +The cmd line_interact() function returns when the user types **Ctrl-d** = or > +**quit**. In this case, EAL is cleaned up and the application exits. > + > +Commands Description > +------------------- > + > +The following sections provide some explanation of the commands. > + > +help command > +~~~~~~~~~~~~ > + > +The application has on-line help for the commands that are available at > runtime. > + > +.. code-block:: console > + > + opae> help > + get_api_version get OPAE API version > + get_proc_type get DPDK process type > + get_image_info get information of image file > + get_status get current status & progress= of FPGA > + get_property <0|1|2|4|8> get property of FPGA > + get_phy_info get information of PHY > + get_parent get parent PCI device of FPGA > + get_child get child PCI device of FPGA > + get_pf1 get physical function 1 devic= e of FPGA > + set_log_level <0-4> set logging level > + set_log_file set logging file > + set_status <0-4> <0-100> set current status & progress= of > FPGA > + enumerate enumerate specified FPGA > + bind bind FPGA with kernel driver > + unbind unbind FPGA from kernel drive= r > + probe probe FPGA with IFPGA driver > + remove remove FPGA from IFPGA driver > + flash update flash of FPGA > + pr partial reconfigure FPGA > + reboot <0-1> reboot FPGA or MAX10 > + cancel cancel flash update > + check display list of PCI devices > + pci_read <0-1024> read PCI configuration space > + pci_write <0-1024> write PCI configuration space > + quit exit DPDK application > + help show commands list > + > +get_api_version command > +~~~~~~~~~~~~~~~~~~~~~~~ > + > +Show OPAE API version which is same to the version of DPDK. > + > +.. code-block:: console > + > + opae> get_api_version > + 21.2.0 > + > +set_log_level command > +~~~~~~~~~~~~~~~~~~~~~~ > + > +Set logging level of OPAE API. Logging level is defined as below. > +0 - CRITICAL > +1 - ERROR > +2 - WARNING > +3 - INFORMATION > +4 - DEBUG > + > +.. code-block:: console > + > + opae> set_log_level 4 > + OPAE-API: Current log level is DEBUG > + Successful > + opae> set_log_level 6 > + OPAE-API: Current log level is DEBUG > + Failed > + > +set_log_file command > +~~~~~~~~~~~~~~~~~~~~~~ > + > +Set logging file of OPAE API. > + > +.. code-block:: console > + > + opae> set_log_file /tmp/ifpga.log > + Successful > + > +get_proc_type command > +~~~~~~~~~~~~~~~~~~~~~ > + > +Show the process type of DPDK. If you start multiple instances of the > +application, the process type of the first one is 'Primary', the others > +are 'Secondary'. > + > +.. code-block:: console > + > + opae> get_proc_type > + Primary > + > +get_image_info command > +~~~~~~~~~~~~~~~~~~~~~~ > + > +Display information of FPGA image file. > + > +.. code-block:: console > + > + opae> get_image_info /home/wei/a10.bin > + Type: FPGA_BBS > + Action: UPDATE > + Total length: 58720256 > + Payload offset: 1024 > + Payload length: 58719232 > + opae> get_image_info /home/wei/data.bin > + OPAE-ERR: Image '/home/wei/data.bin' can not be recognized > + Invalid image file > + > +enumerate command > +~~~~~~~~~~~~~~~~~ > + > +Display PCI address of FPGA with specified vendor ID and device ID. ID v= alue > can > +be set to 0xffff for arbitrary ID. > + > +.. code-block:: console > + > + opae> enumerate 0x8086 0x0b30 > + 0000:24:00.0 > + > +get_property command > +~~~~~~~~~~~~~~~~~~~~ > + > +Display property information of specified FPGA. Property type is defined= as > below. > +0 - All properties > +1 - PCI property > +2 - FME property > +4 - port property > +8 - BMC property > +PCI property is always available, other properties can only be displayed > after > +ifpga driver is probed to the FPGA. > + > +.. code-block:: console > + > + opae> get_property 24:00.0 0 > + PCI: > + PCIe s:b:d.f : 0000:24:00.0 > + kernel driver : vfio-pci > + FME: > + platform : Vista Creek > + DCP version : DCP 1.2 > + phase : Beta > + interface : 2x2x25G > + build version : 0.0.2 > + ports num : 1 > + boot page : user > + pr interface id : a5d72a3c-c8b0-4939-912c-f715e5dc10ca > + PORT0: > + access type : PF > + accelerator id : 8892c23e-2eed-4b44-8bb6-5c88606e07df > + BMC: > + MAX10 version : D.2.0.5 > + NIOS FW version : D.2.0.12 > + > +get_phy_info command > +~~~~~~~~~~~~~~~~~~~~ > + > +Display information and status of PHY connects to the specified FPGA. > + > +.. code-block:: console > + > + opae> get_phy_info 24:00.0 > + retimers num : 2 > + link speed : 25G > + link status : 00 > + > +get_parent command > +~~~~~~~~~~~~~~~~~~ > + > +Display PCI address of upstream device connects to the specified FPGA. > + > +.. code-block:: console > + > + opae> get_parent 24:00.0 > + 0000:22:09.0 > + > +get_child command > +~~~~~~~~~~~~~~~~~ > + > +Display PCI address of downstream device connects to the specified FPGA. > + > +.. code-block:: console > + > + opae> get_child 24:00.0 > + No child > + opae> get_child 22:09.0 > + 0000:24:00.0 > + > +get_pf1 command > +~~~~~~~~~~~~~~~ > + > +Display PCI address of PF1 (physical function 1) of specified FPGA. > + > +.. code-block:: console > + > + opae> get_pf1 24:00.0 > + 0000:26:00.0 > + 0000:26:00.1 > + > +get_status command > +~~~~~~~~~~~~~~~~~~ > + > +Display current RSU status of specified FPGA. > + > +.. code-block:: console > + > + opae> get_status 24:00.0 > + Status: IDLE > + Progress: 0% > + > +set_status command > +~~~~~~~~~~~~~~~~~~ > + > +Set current RSU status of specified FPGA. This command is mainly used fo= r > debug > +purpose. Status value is defined as below. > +0 - IDLE > +1 - PREPARE > +2 - PROGRAM > +3 - COPY > +4 - REBOOT > + > +.. code-block:: console > + > + opae> set_status 24:00.0 2 35 > + Successful > + opae> get_status 24:00.0 > + Status: PROGRAM > + Progress: 35% > + > +unbind command > +~~~~~~~~~~~~~~ > + > +Unbind kernel driver from specified FPGA. > + > +.. code-block:: console > + > + opae> unbind 24:00.0 > + OPAE-ERR: 0000:24:00.0 is probed, remove it first > + Failed > + opae> remove 24:00.0 > + Successful > + opae> unbind 24:00.0 > + Successful > + > +bind command > +~~~~~~~~~~~~ > + > +Bind specified kernel driver to specified FPGA. > + > +.. code-block:: console > + > + opae> bind 24:00.0 vfio-pci > + Successful > + > +probe command > +~~~~~~~~~~~~~ > + > +Probe specified FPGA with DPDK PMD driver. > + > +.. code-block:: console > + > + opae> probe 24:00.0 > + Successful > + > +remove command > +~~~~~~~~~~~~~~ > + > +Remove specified FPGA from DPDK PMD driver. It's a reverse operation to > probe > +command. > + > +.. code-block:: console > + > + opae> remove 24:00.0 > + Successful > + > +flash command > +~~~~~~~~~~~~~ > + > +Update image in flash of specified FPGA. > + > +.. code-block:: console > + > + opae> flash 24:00.0 /home/wei/a10.bin > + Successful > + > +pr command > +~~~~~~~~~~ > + > +Do partial reconfiguration of specified FPGA. > + > +.. code-block:: console > + > + opae> pr 24:00.0 0 /home/wei/nlb0.gbs > + Successful > + > +reboot command > +~~~~~~~~~~~~~~ > + > +Reboot specified FPGA. Reboot type and page is defined as below. > +fpga - reboot FPGA only > +bmc - reboot whole card with FPGA > +0 - factory page > +1 - user page > + > +.. code-block:: console > + > + opae> reboot 24:00.0 fpga 1 > + Successful > + > +cancel command > +~~~~~~~~~~~~~~ > + > +Cancel flash programming of specified FPGA. > + > +.. code-block:: console > + > + opae> cancel 24:00.0 > + Successful > + > +check command > +~~~~~~~~~~~~~ > + > +Display PCI device list established by DPDK. > + > +.. code-block:: console > + > + opae> check > + ID NAME SEG BUS DEV FUNC VID DID KDRV > + 0 0000:00:11.5 0000 00 11 5 8086 2827 unknown > + 1 0000:00:14.0 0000 00 14 0 8086 a1af unknown > + 2 0000:00:16.0 0000 00 16 0 8086 a1ba unknown > + 3 0000:00:1c.0 0000 00 1c 0 8086 a190 unknown > + ...... > + 29 0000:24:00.0 0000 24 00 0 8086 0b30 vfio-pci > + ...... > + > +pci_read command > +~~~~~~~~~~~~~~~~ > + > +Read PCI configuration space of specified FPGA. > + > +.. code-block:: console > + > + opae> pci_read 24:00.0 0 > + 0x0b308086 > + > +pci_write command > +~~~~~~~~~~~~~~~~~ > + > +Write PCI configuration space of specified FPGA. > + > +.. code-block:: console > + > + opae> pci_write 24:00.0 4 0x100406 > + Successful > + > +quit command > +~~~~~~~~~~~~ > + > +Exit this sample application. > + > +.. code-block:: console > + > + opae> quit > diff --git a/examples/ifpga/Makefile b/examples/ifpga/Makefile > new file mode 100644 > index 000000000..6bfd5c8b4 > --- /dev/null > +++ b/examples/ifpga/Makefile > @@ -0,0 +1,45 @@ > +# SPDX-License-Identifier: BSD-3-Clause > +# Copyright(c) 2020-2021 Intel Corporation > + > +# binary name > +APP =3D ifpga > + > +# all source are stored in SRCS-y > +SRCS-y :=3D main.c commands.c > + > +# Build using pkg-config variables if possible > +ifneq ($(shell pkg-config --exists libdpdk && echo 0),0) > +$(error "no installation of DPDK found") > +endif > + > +all: static > +.PHONY: shared static > +shared: build/$(APP)-shared > + ln -sf $(APP)-shared build/$(APP) > +static: build/$(APP)-static > + ln -sf $(APP)-static build/$(APP) > + > +PKGCONF ?=3D pkg-config > + > +PC_FILE :=3D $(shell $(PKGCONF) --path libdpdk 2>/dev/null) > +CFLAGS +=3D -O3 $(shell $(PKGCONF) --cflags libdpdk) -I../../drivers/raw= /ifpga > +LDFLAGS_SHARED =3D $(shell $(PKGCONF) --libs libdpdk) -lrte_bus_pci \ > + -lrte_bus_ifpga -lrte_bus_vdev -lrte_raw_ifpga \ > + -lrte_net_i40e -lrte_net_ipn3ke > +LDFLAGS_STATIC =3D $(shell $(PKGCONF) --static --libs libdpdk) > + > +CFLAGS +=3D -DALLOW_EXPERIMENTAL_API > + > +build/$(APP)-shared: $(SRCS-y) Makefile $(PC_FILE) | build > + $(CC) $(CFLAGS) $(SRCS-y) -o $@ $(LDFLAGS) $(LDFLAGS_SHARED) > + > +build/$(APP)-static: $(SRCS-y) Makefile $(PC_FILE) | build > + $(CC) $(CFLAGS) $(SRCS-y) -o $@ $(LDFLAGS) $(LDFLAGS_STATIC) > + > +build: > + @mkdir -p $@ > + > +.PHONY: clean > +clean: > + rm -f build/$(APP) build/$(APP)-static build/$(APP)-shared > + test -d build && rmdir -p build || true > diff --git a/examples/ifpga/commands.c b/examples/ifpga/commands.c > new file mode 100644 > index 000000000..eb2fe1ca6 > --- /dev/null > +++ b/examples/ifpga/commands.c > @@ -0,0 +1,1321 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(c) 2020-2021 Intel Corporation. > + * All rights reserved. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > +#include > +#include > +#include > +#include > + > +#include "commands.h" > + > +static int parse_pciaddr(const char *bdf, opae_pci_device *id) > +{ > + size_t len =3D 0; > + unsigned int domain =3D 0; > + unsigned int bus =3D 0; > + unsigned int devid =3D 0; > + unsigned int function =3D 0; > + > + if (!bdf || !id) > + return -EINVAL; > + > + len =3D strlen(bdf); > + if ((len < 5) || (len > 12)) > + return -EINVAL; > + > + len =3D sscanf(bdf, "%x:%x:%x.%d", &domain, &bus, &devid, > &function); > + if (len =3D=3D 4) { > + snprintf(id->bdf, sizeof(id->bdf), "%04x:%02x:%02x.%d", > + domain, bus, devid, function); > + } else { > + len =3D sscanf(bdf, "%x:%x.%d", &bus, &devid, &function); > + if (len =3D=3D 3) { > + snprintf(id->bdf, sizeof(id->bdf), > "%04x:%02x:%02x.%d", > + 0, bus, devid, function); > + } else { > + return -EINVAL; > + } > + } > + return 0; > +} > + > +static void uuid_to_str(opae_uuid *id, uuid_str *str) > +{ > + uint8_t *b =3D NULL; > + char *p =3D NULL; > + int i, j; > + > + if (!id || !str) > + return; > + > + b =3D &id->b[15]; > + p =3D str->s; > + for (i =3D 0; i < 4; i++, b--, p +=3D 2) > + sprintf(p, "%02x", *b); > + sprintf(p++, "-"); > + for (i =3D 0; i < 3; i++) { > + for (j =3D 0; j < 2; j++, b--, p +=3D 2) > + sprintf(p, "%02x", *b); > + sprintf(p++, "-"); > + } > + for (i =3D 0; i < 6; i++, b--, p +=3D 2) > + sprintf(p, "%02x", *b); > +} > + > +/* *** GET API VERSION *** */ > +struct cmd_version_result { > + cmdline_fixed_string_t cmd; > +}; > + > +static void cmd_version_parsed(__rte_unused void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + opae_api_version ver; > + opae_get_api_version(&ver); > + cmdline_printf(cl, "%d.%d.%d\n", ver.major, ver.minor, ver.micro); > +} > + > +cmdline_parse_token_string_t cmd_version_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_version_result, cmd, > "get_api_version"); > + > +cmdline_parse_inst_t cmd_get_api_version =3D { > + .f =3D cmd_version_parsed, > + .data =3D NULL, > + .help_str =3D "get OPAE API version", > + .tokens =3D { > + (void *)&cmd_version_cmd, > + NULL, > + }, > +}; > + > +/* *** GET PROC TYPE *** */ > +struct cmd_proc_type_result { > + cmdline_fixed_string_t cmd; > +}; > + > +static void cmd_proc_type_parsed(__rte_unused void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + int type =3D opae_get_proc_type(); > + > + if (type =3D=3D 0) > + cmdline_printf(cl, "Primary\n"); > + else if (type =3D=3D 1) > + cmdline_printf(cl, "Secondary\n"); > + else > + cmdline_printf(cl, "Unknown\n"); > +} > + > +cmdline_parse_token_string_t cmd_proc_type_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_proc_type_result, cmd, > "get_proc_type"); > + > +cmdline_parse_inst_t cmd_get_proc_type =3D { > + .f =3D cmd_proc_type_parsed, > + .data =3D NULL, > + .help_str =3D "get DPDK process type", > + .tokens =3D { > + (void *)&cmd_proc_type_cmd, > + NULL, > + }, > +}; > + > +/* *** GET IMAGE INFO *** */ > +struct cmd_image_info_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t path; > +}; > + > +static void cmd_image_info_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_image_info_result *res =3D parsed_result; > + opae_img_info info; > + > + if (opae_get_image_info(res->path, &info) =3D=3D 0) { > + cmdline_printf(cl, "%-16s", "Type:"); > + if (info.type =3D=3D OPAE_IMG_TYPE_BBS) > + cmdline_printf(cl, "FPGA_BBS\n"); > + else if (info.type =3D=3D OPAE_IMG_TYPE_BMC) > + cmdline_printf(cl, "BMC\n"); > + else if (info.type =3D=3D OPAE_IMG_TYPE_GBS) > + cmdline_printf(cl, "FGPA_GBS\n"); > + else > + cmdline_printf(cl, "Unknown\n"); > + cmdline_printf(cl, "%-16s", "Action:"); > + if (info.subtype =3D=3D OPAE_IMG_SUBTYPE_UPDATE) > + cmdline_printf(cl, "UPDATE\n"); > + else if (info.subtype =3D=3D OPAE_IMG_SUBTYPE_CANCELLATION) > + cmdline_printf(cl, "CANCELLATION\n"); > + else if (info.subtype =3D=3D > OPAE_IMG_SUBTYPE_ROOT_KEY_HASH_256) > + cmdline_printf(cl, "ROOT_HASH_256\n"); > + else if (info.subtype =3D=3D > OPAE_IMG_SUBTYPE_ROOT_KEY_HASH_384) > + cmdline_printf(cl, "ROOT_HASH_384\n"); > + else > + cmdline_printf(cl, "Unknown\n"); > + cmdline_printf(cl, "%-16s%u\n", "Total length:", > + info.total_len); > + cmdline_printf(cl, "%-16s%u\n", "Payload offset:", > + info.payload_offset); > + cmdline_printf(cl, "%-16s%u\n", "Payload length:", > + info.payload_len); > + } else { > + cmdline_printf(cl, "Invalid image file\n"); > + } > +} > + > +cmdline_parse_token_string_t cmd_image_info_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_image_info_result, cmd, > + "get_image_info"); > +cmdline_parse_token_string_t cmd_image_info_path =3D > + TOKEN_STRING_INITIALIZER(struct cmd_image_info_result, path, > NULL); > + > +cmdline_parse_inst_t cmd_get_image_info =3D { > + .f =3D cmd_image_info_parsed, > + .data =3D NULL, > + .help_str =3D "get information of image file", > + .tokens =3D { > + (void *)&cmd_image_info_cmd, > + (void *)&cmd_image_info_path, > + NULL, > + }, > +}; > + > +/* *** GET STATUS *** */ > +struct cmd_get_status_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > +}; > + > +static void cmd_get_status_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_get_status_result *res =3D parsed_result; > + opae_pci_device id; > + uint32_t stat, prog; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (opae_load_rsu_status(&id, &stat, &prog) =3D=3D 0) { > + cmdline_printf(cl, "%-10s", "Status:"); > + if (stat =3D=3D 0) > + cmdline_printf(cl, "IDLE\n"); > + else if (stat =3D=3D 1) > + cmdline_printf(cl, "PREPARE\n"); > + else if (stat =3D=3D 2) > + cmdline_printf(cl, "PROGRAM\n"); > + else if (stat =3D=3D 3) > + cmdline_printf(cl, "COPY\n"); > + else if (stat =3D=3D 4) > + cmdline_printf(cl, "REBOOT\n"); > + else > + cmdline_printf(cl, "unknown\n"); > + cmdline_printf(cl, "%-10s%u%%\n", "Progress:", prog); > + } else { > + cmdline_printf(cl, "Failed\n"); > + } > +} > + > +cmdline_parse_token_string_t cmd_get_status_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_get_status_result, cmd, > "get_status"); > +cmdline_parse_token_string_t cmd_get_status_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_get_status_result, bdf, NULL); > + > +cmdline_parse_inst_t cmd_get_status =3D { > + .f =3D cmd_get_status_parsed, > + .data =3D NULL, > + .help_str =3D "get current status & progress of FPGA", > + .tokens =3D { > + (void *)&cmd_get_status_cmd, > + (void *)&cmd_get_status_bdf, > + NULL, > + }, > +}; > + > +/* *** GET PROPERTY *** */ > +struct cmd_property_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > + int32_t type; > +}; > + > +static void cmd_property_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_property_result *res =3D parsed_result; > + opae_pci_device id; > + opae_fpga_property prop; > + uuid_str str; > + uint32_t port =3D 0; > + > + switch (res->type) { > + case 0: > + case 1: > + case 2: > + case 4: > + case 8: > + break; > + default: > + cmdline_printf(cl, "%d is invalid type of property\n", > + res->type); > + return; > + } > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (opae_get_property(&id, &prop, res->type) =3D=3D 0) { > + if ((res->type =3D=3D 0) || (res->type =3D=3D 1)) { > + cmdline_printf(cl, "%s:\n", "PCI"); > + cmdline_printf(cl, " %-16s : %s\n", > + "PCIe s:b:d.f", prop.pci.pci_addr); > + cmdline_printf(cl, " %-16s : %s\n", > + "kernel driver", prop.pci.drv_name); > + } > + if ((res->type =3D=3D 0) || (res->type =3D=3D 2)) { > + cmdline_printf(cl, "%s:\n", "FME"); > + cmdline_printf(cl, " %-16s : %s\n", > + "platform", prop.fme.platform_name); > + cmdline_printf(cl, " %-16s : %s\n", > + "DCP version", prop.fme.dcp_version); > + cmdline_printf(cl, " %-16s : %s\n", > + "phase", prop.fme.release_name); > + cmdline_printf(cl, " %-16s : %s\n", > + "interface", prop.fme.interface_type); > + cmdline_printf(cl, " %-16s : %s\n", > + "build version", prop.fme.build_version); > + cmdline_printf(cl, " %-16s : %u\n", > + "ports num", prop.fme.num_ports); > + cmdline_printf(cl, " %-16s : %s\n", > + "boot page", prop.fme.boot_page ? "user" : > "factory"); > + uuid_to_str(&prop.fme.pr_id, &str); > + cmdline_printf(cl, " %-16s : %s\n", "pr interface id", > + str.s); > + } > + if ((res->type =3D=3D 0) || (res->type =3D=3D 4)) { > + for (port =3D 0; port < prop.fme.num_ports; port++) { > + cmdline_printf(cl, "%s%d:\n", "PORT", port); > + cmdline_printf(cl, " %-16s : %s\n", > + "access type", > + prop.port[port].type ? "VF" : "PF"); > + uuid_to_str(&prop.port[port].afu_id, &str); > + cmdline_printf(cl, " %-16s : %s\n", > + "accelerator id", str.s); > + } > + } > + if ((res->type =3D=3D 0) || (res->type =3D=3D 8)) { > + cmdline_printf(cl, "%s:\n", "BMC"); > + cmdline_printf(cl, " %-16s : %s\n", > + "MAX10 version", prop.bmc.bmc_version); > + cmdline_printf(cl, " %-16s : %s\n", > + "NIOS FW version", prop.bmc.fw_version); > + } > + } else { > + cmdline_printf(cl, "Failed\n"); > + } > +} > + > +cmdline_parse_token_string_t cmd_property_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_property_result, cmd, > "get_property"); > +cmdline_parse_token_string_t cmd_property_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_property_result, bdf, NULL); > +cmdline_parse_token_num_t cmd_property_type =3D > + TOKEN_NUM_INITIALIZER(struct cmd_property_result, type, > RTE_INT32); > + > +cmdline_parse_inst_t cmd_get_property =3D { > + .f =3D cmd_property_parsed, > + .data =3D NULL, > + .help_str =3D "get property of FPGA", > + .tokens =3D { > + (void *)&cmd_property_cmd, > + (void *)&cmd_property_bdf, > + (void *)&cmd_property_type, > + NULL, > + }, > +}; > + > +/* *** GET PHY INFO *** */ > +struct cmd_phy_info_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > +}; > + > +static void cmd_phy_info_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_phy_info_result *res =3D parsed_result; > + opae_pci_device id; > + opae_phy_info info; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (opae_get_phy_info(&id, &info) =3D=3D 0) { > + cmdline_printf(cl, " %-16s : %u\n", > + "retimers num", info.num_retimers); > + cmdline_printf(cl, " %-16s : %uG\n", > + "link speed", info.link_speed); > + cmdline_printf(cl, " %-16s : %02x\n", > + "link status", info.link_status); > + } else { > + cmdline_printf(cl, "Failed\n"); > + } > +} > + > +cmdline_parse_token_string_t cmd_phy_info_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_phy_info_result, cmd, > "get_phy_info"); > +cmdline_parse_token_string_t cmd_phy_info_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_phy_info_result, bdf, NULL); > + > +cmdline_parse_inst_t cmd_phy_info =3D { > + .f =3D cmd_phy_info_parsed, > + .data =3D NULL, > + .help_str =3D "get information of PHY", > + .tokens =3D { > + (void *)&cmd_phy_info_cmd, > + (void *)&cmd_phy_info_bdf, > + NULL, > + }, > +}; > + > +/* *** GET PARENT *** */ > +struct cmd_parent_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > +}; > + > +static void cmd_parent_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_parent_result *res =3D parsed_result; > + opae_pci_device id; > + opae_pci_device parent; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (opae_get_parent(&id, &parent) > 0) > + cmdline_printf(cl, "%s\n", parent.bdf); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_parent_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_parent_result, cmd, > "get_parent"); > +cmdline_parse_token_string_t cmd_parent_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_parent_result, bdf, NULL); > + > +cmdline_parse_inst_t cmd_get_parent =3D { > + .f =3D cmd_parent_parsed, > + .data =3D NULL, > + .help_str =3D "get parent PCI device of FPGA", > + .tokens =3D { > + (void *)&cmd_parent_cmd, > + (void *)&cmd_parent_bdf, > + NULL, > + }, > +}; > + > +/* *** GET CHILD *** */ > +struct cmd_child_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > +}; > + > +static void cmd_child_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_child_result *res =3D parsed_result; > + opae_pci_device id; > + pcidev_id child; > + int i, count =3D 0; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + count =3D opae_get_child(&id, NULL, 0); > + if (count > 0) { > + child =3D (pcidev_id)malloc(sizeof(opae_pci_device) * count); > + if (child) { > + opae_get_child(&id, child, count); > + for (i =3D 0; i < count; i++) > + cmdline_printf(cl, "%s\n", child[i].bdf); > + free(child); > + } else { > + cmdline_printf(cl, "No memory\n"); > + } > + } else if (count =3D=3D 0) { > + cmdline_printf(cl, "No child\n"); > + } else { > + cmdline_printf(cl, "Failed\n"); > + } > +} > + > +cmdline_parse_token_string_t cmd_child_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_child_result, cmd, > "get_child"); > +cmdline_parse_token_string_t cmd_child_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_child_result, bdf, NULL); > + > +cmdline_parse_inst_t cmd_get_child =3D { > + .f =3D cmd_child_parsed, > + .data =3D NULL, > + .help_str =3D "get child PCI device of FPGA", > + .tokens =3D { > + (void *)&cmd_child_cmd, > + (void *)&cmd_child_bdf, > + NULL, > + }, > +}; > + > +/* *** GET PF1 *** */ > +struct cmd_pf1_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > +}; > + > +static void cmd_pf1_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_pf1_result *res =3D parsed_result; > + opae_pci_device id; > + pcidev_id peer; > + int i, count =3D 0; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + count =3D opae_get_pf1(&id, NULL, 0); > + if (count > 0) { > + peer =3D (pcidev_id)malloc(sizeof(opae_pci_device) * count); > + if (peer) { > + opae_get_pf1(&id, peer, count); > + for (i =3D 0; i < count; i++) > + cmdline_printf(cl, "%s\n", peer[i].bdf); > + free(peer); > + } else { > + cmdline_printf(cl, "No memory\n"); > + } > + } else if (count =3D=3D 0) { > + cmdline_printf(cl, "No PF1\n"); > + } else { > + cmdline_printf(cl, "Failed\n"); > + } > +} > + > +cmdline_parse_token_string_t cmd_pf1_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_pf1_result, cmd, "get_pf1"); > +cmdline_parse_token_string_t cmd_pf1_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_pf1_result, bdf, NULL); > + > +cmdline_parse_inst_t cmd_get_pf1 =3D { > + .f =3D cmd_pf1_parsed, > + .data =3D NULL, > + .help_str =3D "get physical function 1 device of FPGA", > + .tokens =3D { > + (void *)&cmd_pf1_cmd, > + (void *)&cmd_pf1_bdf, > + NULL, > + }, > +}; > + > +/* *** SET LOG LEVEL *** */ > +struct cmd_log_level_result { > + cmdline_fixed_string_t cmd; > + int32_t level; > +}; > + > +static void cmd_log_level_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_log_level_result *res =3D parsed_result; > + if (opae_set_log_level(res->level) =3D=3D res->level) > + cmdline_printf(cl, "Successful\n"); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_log_level_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_log_level_result, cmd, > "set_log_level"); > +cmdline_parse_token_num_t cmd_log_level_level =3D > + TOKEN_NUM_INITIALIZER(struct cmd_log_level_result, level, > RTE_INT32); > + > +cmdline_parse_inst_t cmd_set_log_level =3D { > + .f =3D cmd_log_level_parsed, > + .data =3D NULL, > + .help_str =3D "set logging level", > + .tokens =3D { > + (void *)&cmd_log_level_cmd, > + (void *)&cmd_log_level_level, > + NULL, > + }, > +}; > + > +/* *** SET LOG FILE *** */ > +struct cmd_log_file_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t path; > +}; > + > +static void cmd_log_file_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_log_file_result *res =3D parsed_result; > + if (opae_set_log_file(res->path, 1) =3D=3D 0) > + cmdline_printf(cl, "Successful\n"); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_log_file_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_log_file_result, cmd, > "set_log_file"); > +cmdline_parse_token_string_t cmd_log_file_path =3D > + TOKEN_STRING_INITIALIZER(struct cmd_log_file_result, path, NULL); > + > +cmdline_parse_inst_t cmd_set_log_file =3D { > + .f =3D cmd_log_file_parsed, > + .data =3D NULL, > + .help_str =3D "set logging file", > + .tokens =3D { > + (void *)&cmd_log_file_cmd, > + (void *)&cmd_log_file_path, > + NULL, > + }, > +}; > + > +/* *** SET STATUS *** */ > +struct cmd_set_status_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > + uint32_t stat; > + uint32_t prog; > +}; > + > +static void cmd_set_status_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_set_status_result *res =3D parsed_result; > + opae_pci_device id; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + if ((res->stat > 4) || (res->prog > 100)) { > + cmdline_printf(cl, "%u,%u is invalid status\n", res->stat, > + res->prog); > + return; > + } > + > + if (opae_store_rsu_status(&id, res->stat, res->prog) =3D=3D 0) > + cmdline_printf(cl, "Successful\n"); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_set_status_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_set_status_result, cmd, > "set_status"); > +cmdline_parse_token_string_t cmd_set_status_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_set_status_result, bdf, NULL); > +cmdline_parse_token_num_t cmd_set_status_stat =3D > + TOKEN_NUM_INITIALIZER(struct cmd_set_status_result, stat, > RTE_UINT32); > +cmdline_parse_token_num_t cmd_set_status_prog =3D > + TOKEN_NUM_INITIALIZER(struct cmd_set_status_result, prog, > RTE_UINT32); > + > +cmdline_parse_inst_t cmd_set_status =3D { > + .f =3D cmd_set_status_parsed, > + .data =3D NULL, > + .help_str =3D "set current status & progress of FPGA", > + .tokens =3D { > + (void *)&cmd_set_status_cmd, > + (void *)&cmd_set_status_bdf, > + (void *)&cmd_set_status_stat, > + (void *)&cmd_set_status_prog, > + NULL, > + }, > +}; > + > +/* *** ENUMERATE *** */ > +struct cmd_enumerate_result { > + cmdline_fixed_string_t cmd; > + uint32_t vid; > + uint32_t did; > +}; > + > +static void cmd_enumerate_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_enumerate_result *res =3D parsed_result; > + opae_pci_id filter; > + opae_pci_device *id; > + int i, count =3D 0; > + > + filter.vendor_id =3D res->vid; > + filter.device_id =3D res->did; > + filter.class_id =3D BIT_SET_32; > + filter.subsystem_vendor_id =3D BIT_SET_16; > + filter.subsystem_device_id =3D BIT_SET_16; > + > + count =3D opae_enumerate(&filter, NULL, 0); > + if (count > 0) { > + id =3D (opae_pci_device *)malloc(sizeof(opae_pci_device) * > count); > + if (id) { > + opae_enumerate(&filter, id, count); > + for (i =3D 0; i < count; i++) > + cmdline_printf(cl, "%s\n", id[i].bdf); > + free(id); > + } else { > + cmdline_printf(cl, "No memory\n"); > + } > + } else if (count =3D=3D 0) { > + cmdline_printf(cl, "Not found\n"); > + } else { > + cmdline_printf(cl, "Failed\n"); > + } > +} > + > +cmdline_parse_token_string_t cmd_enumerate_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_enumerate_result, cmd, > "enumerate"); > +cmdline_parse_token_num_t cmd_enumerate_vid =3D > + TOKEN_NUM_INITIALIZER(struct cmd_enumerate_result, vid, > RTE_UINT32); > +cmdline_parse_token_num_t cmd_enumerate_did =3D > + TOKEN_NUM_INITIALIZER(struct cmd_enumerate_result, did, > RTE_UINT32); > + > +cmdline_parse_inst_t cmd_enumerate =3D { > + .f =3D cmd_enumerate_parsed, > + .data =3D NULL, > + .help_str =3D "enumerate specified FPGA", > + .tokens =3D { > + (void *)&cmd_enumerate_cmd, > + (void *)&cmd_enumerate_vid, > + (void *)&cmd_enumerate_did, > + NULL, > + }, > +}; > + > +/* *** BIND *** */ > +struct cmd_bind_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > + cmdline_fixed_string_t drv; > +}; > + > +static void cmd_bind_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_bind_result *res =3D parsed_result; > + opae_pci_device id; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (opae_bind_driver(&id, res->drv) =3D=3D 0) > + cmdline_printf(cl, "Successful\n"); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_bind_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_bind_result, cmd, "bind"); > +cmdline_parse_token_string_t cmd_bind_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_bind_result, bdf, NULL); > +cmdline_parse_token_string_t cmd_bind_drv =3D > + TOKEN_STRING_INITIALIZER(struct cmd_bind_result, drv, NULL); > + > +cmdline_parse_inst_t cmd_bind =3D { > + .f =3D cmd_bind_parsed, > + .data =3D NULL, > + .help_str =3D "bind FPGA with kernel driver", > + .tokens =3D { > + (void *)&cmd_bind_cmd, > + (void *)&cmd_bind_bdf, > + (void *)&cmd_bind_drv, > + NULL, > + }, > +}; > + > +/* *** UNBIND *** */ > +struct cmd_unbind_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > +}; > + > +static void cmd_unbind_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_unbind_result *res =3D parsed_result; > + opae_pci_device id; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (opae_unbind_driver(&id) =3D=3D 0) > + cmdline_printf(cl, "Successful\n"); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_unbind_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_bind_result, cmd, "unbind"); > +cmdline_parse_token_string_t cmd_unbind_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_bind_result, bdf, NULL); > + > +cmdline_parse_inst_t cmd_unbind =3D { > + .f =3D cmd_unbind_parsed, > + .data =3D NULL, > + .help_str =3D "unbind FPGA from kernel driver", > + .tokens =3D { > + (void *)&cmd_unbind_cmd, > + (void *)&cmd_unbind_bdf, > + NULL, > + }, > +}; > + > +/* *** PROBE *** */ > +struct cmd_probe_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > +}; > + > +static void cmd_probe_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_probe_result *res =3D parsed_result; > + opae_pci_device id; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (opae_probe_device(&id) =3D=3D 0) > + cmdline_printf(cl, "Successful\n"); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_probe_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_probe_result, cmd, "probe"); > +cmdline_parse_token_string_t cmd_probe_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_probe_result, bdf, NULL); > + > +cmdline_parse_inst_t cmd_probe =3D { > + .f =3D cmd_probe_parsed, > + .data =3D NULL, > + .help_str =3D "probe FPGA with IFPGA driver", > + .tokens =3D { > + (void *)&cmd_probe_cmd, > + (void *)&cmd_probe_bdf, > + NULL, > + }, > +}; > + > +/* *** REMOVE *** */ > +struct cmd_remove_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > +}; > + > +static void cmd_remove_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_remove_result *res =3D parsed_result; > + opae_pci_device id; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (opae_remove_device(&id) =3D=3D 0) > + cmdline_printf(cl, "Successful\n"); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_remove_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_remove_result, cmd, > "remove"); > +cmdline_parse_token_string_t cmd_remove_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_remove_result, bdf, NULL); > + > +cmdline_parse_inst_t cmd_remove =3D { > + .f =3D cmd_remove_parsed, > + .data =3D NULL, > + .help_str =3D "remove FPGA from IFPGA driver", > + .tokens =3D { > + (void *)&cmd_remove_cmd, > + (void *)&cmd_remove_bdf, > + NULL, > + }, > +}; > + > +/* *** FLASH *** */ > +struct cmd_flash_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > + cmdline_fixed_string_t path; > +}; > + > +static void cmd_flash_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_flash_result *res =3D parsed_result; > + opae_pci_device id; > + uint64_t stat =3D 0; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (opae_update_flash(&id, res->path, &stat)) > + cmdline_printf(cl, "Error: 0x%lx\n", stat); > +} > + > +cmdline_parse_token_string_t cmd_flash_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_flash_result, cmd, "flash"); > +cmdline_parse_token_string_t cmd_flash_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_flash_result, bdf, NULL); > +cmdline_parse_token_string_t cmd_flash_path =3D > + TOKEN_STRING_INITIALIZER(struct cmd_flash_result, path, NULL); > + > +cmdline_parse_inst_t cmd_flash =3D { > + .f =3D cmd_flash_parsed, > + .data =3D NULL, > + .help_str =3D "update flash of FPGA", > + .tokens =3D { > + (void *)&cmd_flash_cmd, > + (void *)&cmd_flash_bdf, > + (void *)&cmd_flash_path, > + NULL, > + }, > +}; > + > +/* *** PR *** */ > +struct cmd_pr_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > + int32_t port; > + cmdline_fixed_string_t path; > +}; > + > +static void cmd_pr_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_pr_result *res =3D parsed_result; > + opae_pci_device id; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (opae_partial_reconfigure(&id, res->port, res->path) =3D=3D 0) > + cmdline_printf(cl, "Successful\n"); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_pr_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_pr_result, cmd, "pr"); > +cmdline_parse_token_string_t cmd_pr_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_pr_result, bdf, NULL); > +cmdline_parse_token_num_t cmd_pr_port =3D > + TOKEN_NUM_INITIALIZER(struct cmd_pr_result, port, RTE_INT32); > +cmdline_parse_token_string_t cmd_pr_path =3D > + TOKEN_STRING_INITIALIZER(struct cmd_pr_result, path, NULL); > + > +cmdline_parse_inst_t cmd_pr =3D { > + .f =3D cmd_pr_parsed, > + .data =3D NULL, > + .help_str =3D "partial reconfigure FPGA", > + .tokens =3D { > + (void *)&cmd_pr_cmd, > + (void *)&cmd_pr_bdf, > + (void *)&cmd_pr_port, > + (void *)&cmd_pr_path, > + NULL, > + }, > +}; > + > +/* *** REBOOT *** */ > +struct cmd_reboot_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > + cmdline_fixed_string_t type; > + int32_t page; > +}; > + > +static void cmd_reboot_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_reboot_result *res =3D parsed_result; > + opae_pci_device id; > + int type =3D 0; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (!strcmp(res->type, "fpga")) { > + type =3D 0; > + } else if (!strcmp(res->type, "bmc")) { > + type =3D 1; > + } else { > + cmdline_printf(cl, "%s is invalid reboot type\n", res->type); > + return; > + } > + > + if (opae_reboot_device(&id, type, res->page) =3D=3D 0) > + cmdline_printf(cl, "Successful\n"); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_reboot_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_reboot_result, cmd, > "reboot"); > +cmdline_parse_token_string_t cmd_reboot_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_reboot_result, bdf, NULL); > +cmdline_parse_token_string_t cmd_reboot_type =3D > + TOKEN_STRING_INITIALIZER(struct cmd_reboot_result, type, NULL); > +cmdline_parse_token_num_t cmd_reboot_page =3D > + TOKEN_NUM_INITIALIZER(struct cmd_reboot_result, page, > RTE_INT32); > + > +cmdline_parse_inst_t cmd_reboot =3D { > + .f =3D cmd_reboot_parsed, > + .data =3D NULL, > + .help_str =3D "reboot FPGA or MAX10", > + .tokens =3D { > + (void *)&cmd_reboot_cmd, > + (void *)&cmd_reboot_bdf, > + (void *)&cmd_reboot_type, > + (void *)&cmd_reboot_page, > + NULL, > + }, > +}; > + > +/* *** CANCEL *** */ > +struct cmd_cancel_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > +}; > + > +static void cmd_cancel_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_cancel_result *res =3D parsed_result; > + opae_pci_device id; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (opae_cancel_flash_update(&id, 0) =3D=3D 0) > + cmdline_printf(cl, "Successful\n"); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_cancel_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_cancel_result, cmd, "cancel"); > +cmdline_parse_token_string_t cmd_cancel_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_cancel_result, bdf, NULL); > + > +cmdline_parse_inst_t cmd_cancel =3D { > + .f =3D cmd_cancel_parsed, > + .data =3D NULL, > + .help_str =3D "cancel flash update", > + .tokens =3D { > + (void *)&cmd_cancel_cmd, > + (void *)&cmd_cancel_bdf, > + NULL, > + }, > +}; > + > +/* *** CHECK *** */ > +struct cmd_check_result { > + cmdline_fixed_string_t cmd; > +}; > + > +static void cmd_check_parsed(__rte_unused void *parsed_result, > + __rte_unused struct cmdline *cl, __rte_unused void *data) > +{ > + opae_check_pcidev_list(); > +} > + > +cmdline_parse_token_string_t cmd_check_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_check_result, cmd, "check"); > + > +cmdline_parse_inst_t cmd_check =3D { > + .f =3D cmd_check_parsed, > + .data =3D NULL, > + .help_str =3D "display list of PCI devices", > + .tokens =3D { > + (void *)&cmd_check_cmd, > + NULL, > + }, > +}; > + > +/* *** PCI READ *** */ > +struct cmd_pci_read_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > + uint32_t offset; > +}; > + > +static void cmd_pci_read_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_pci_read_result *res =3D parsed_result; > + opae_pci_device id; > + uint32_t offset =3D 0; > + uint32_t value =3D 0; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (res->offset & 0x3) { > + offset =3D res->offset & ~3; > + cmdline_printf(cl, "align offset to 0x%x\n", offset); > + } else { > + offset =3D res->offset; > + } > + > + if (opae_read_pci_cfg(&id, offset, &value) =3D=3D 0) > + cmdline_printf(cl, "0x%08x\n", value); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_pci_read_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_pci_read_result, cmd, > "pci_read"); > +cmdline_parse_token_string_t cmd_pci_read_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_pci_read_result, bdf, NULL); > +cmdline_parse_token_num_t cmd_pci_read_offset =3D > + TOKEN_NUM_INITIALIZER(struct cmd_pci_read_result, offset, > RTE_UINT32); > + > +cmdline_parse_inst_t cmd_pci_read =3D { > + .f =3D cmd_pci_read_parsed, > + .data =3D NULL, > + .help_str =3D "read PCI configuration space", > + .tokens =3D { > + (void *)&cmd_pci_read_cmd, > + (void *)&cmd_pci_read_bdf, > + (void *)&cmd_pci_read_offset, > + NULL, > + }, > +}; > + > +/* *** PCI WRITE *** */ > +struct cmd_pci_write_result { > + cmdline_fixed_string_t cmd; > + cmdline_fixed_string_t bdf; > + uint32_t offset; > + uint32_t value; > +}; > + > +static void cmd_pci_write_parsed(void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + struct cmd_pci_write_result *res =3D parsed_result; > + opae_pci_device id; > + uint32_t offset =3D 0; > + > + if (parse_pciaddr(res->bdf, &id) < 0) { > + cmdline_printf(cl, "%s is invalid PCI address\n", res->bdf); > + return; > + } > + > + if (res->offset & 0x3) { > + offset =3D res->offset & ~3; > + cmdline_printf(cl, "align offset to 0x%x\n", offset); > + } else { > + offset =3D res->offset; > + } > + > + if (opae_write_pci_cfg(&id, offset, res->value) =3D=3D 0) > + cmdline_printf(cl, "Successful\n"); > + else > + cmdline_printf(cl, "Failed\n"); > +} > + > +cmdline_parse_token_string_t cmd_pci_write_cmd =3D > + TOKEN_STRING_INITIALIZER(struct cmd_pci_write_result, cmd, > "pci_write"); > +cmdline_parse_token_string_t cmd_pci_write_bdf =3D > + TOKEN_STRING_INITIALIZER(struct cmd_pci_write_result, bdf, NULL); > +cmdline_parse_token_num_t cmd_pci_write_offset =3D > + TOKEN_NUM_INITIALIZER(struct cmd_pci_write_result, offset, > RTE_UINT32); > +cmdline_parse_token_num_t cmd_pci_write_value =3D > + TOKEN_NUM_INITIALIZER(struct cmd_pci_write_result, value, > RTE_UINT32); > + > +cmdline_parse_inst_t cmd_pci_write =3D { > + .f =3D cmd_pci_write_parsed, > + .data =3D NULL, > + .help_str =3D "write PCI configuration space", > + .tokens =3D { > + (void *)&cmd_pci_write_cmd, > + (void *)&cmd_pci_write_bdf, > + (void *)&cmd_pci_write_offset, > + (void *)&cmd_pci_write_value, > + NULL, > + }, > +}; > + > +/* *** QUIT *** */ > +struct cmd_quit_result { > + cmdline_fixed_string_t quit; > +}; > + > +static void cmd_quit_parsed(__rte_unused void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + cmdline_quit(cl); > +} > + > +cmdline_parse_token_string_t cmd_quit_quit =3D > + TOKEN_STRING_INITIALIZER(struct cmd_quit_result, quit, "quit"); > + > +cmdline_parse_inst_t cmd_quit =3D { > + .f =3D cmd_quit_parsed, > + .data =3D NULL, > + .help_str =3D "exit DPDK application", > + .tokens =3D { > + (void *)&cmd_quit_quit, > + NULL, > + }, > +}; > + > +/* *** HELP *** */ > +struct cmd_help_result { > + cmdline_fixed_string_t help; > +}; > + > +static void cmd_help_parsed(__rte_unused void *parsed_result, > + struct cmdline *cl, __rte_unused void *data) > +{ > + cmdline_printf(cl, > + " get_api_version \t\t" > + "get OPAE API version\n" > + " get_proc_type \t\t" > + "get DPDK process type\n" > + " get_image_info \t\t" > + "get information of image file\n" > + " get_status \t\t" > + "get current status & progress of FPGA\n" > + " get_property <0|1|2|4|8>\t\t" > + "get property of FPGA\n" > + " get_phy_info \t\t" > + "get information of PHY\n" > + " get_parent \t\t" > + "get parent PCI device of FPGA\n" > + " get_child \t\t" > + "get child PCI device of FPGA\n" > + " get_pf1 \t\t" > + "get physical function 1 device of FPGA\n" > + " set_log_level <0-4> \t\t" > + "set logging level\n" > + " set_log_file \t\t" > + "set logging file\n" > + " set_status <0-4> <0-100>\t\t" > + "set current status & progress of FPGA\n" > + " enumerate \t\t" > + "enumerate specified FPGA\n" > + " bind \t\t" > + "bind FPGA with kernel driver\n" > + " unbind \t\t" > + "unbind FPGA from kernel driver\n" > + " probe \t\t" > + "probe FPGA with IFPGA driver\n" > + " remove \t\t" > + "remove FPGA from IFPGA driver\n" > + " flash \t\t" > + "update flash of FPGA\n" > + " pr \t\t" > + "partial reconfigure FPGA\n" > + " reboot <0-1> \t\t" > + "reboot FPGA or MAX10\n" > + " cancel \t\t" > + "cancel flash update\n" > + " check \t\t" > + "display list of PCI devices\n" > + " pci_read <0-1024> \t\t" > + "read PCI configuration space\n" > + " pci_write <0-1024> \t\t" > + "write PCI configuration space\n" > + " quit \t\t" > + "exit DPDK application\n" > + " help \t\t" > + "show commands list\n"); > +} > + > +cmdline_parse_token_string_t cmd_help_help =3D > + TOKEN_STRING_INITIALIZER(struct cmd_help_result, help, "help"); > + > +cmdline_parse_inst_t cmd_help =3D { > + .f =3D cmd_help_parsed, > + .data =3D NULL, > + .help_str =3D "show commands list", > + .tokens =3D { > + (void *)&cmd_help_help, > + NULL, > + }, > +}; > + > +/****** CONTEXT (list of commands) */ > +cmdline_parse_ctx_t main_ctx[] =3D { > + (cmdline_parse_inst_t *)&cmd_get_image_info, > + (cmdline_parse_inst_t *)&cmd_get_api_version, > + (cmdline_parse_inst_t *)&cmd_get_proc_type, > + (cmdline_parse_inst_t *)&cmd_get_status, > + (cmdline_parse_inst_t *)&cmd_get_property, > + (cmdline_parse_inst_t *)&cmd_phy_info, > + (cmdline_parse_inst_t *)&cmd_get_parent, > + (cmdline_parse_inst_t *)&cmd_get_child, > + (cmdline_parse_inst_t *)&cmd_get_pf1, > + (cmdline_parse_inst_t *)&cmd_set_log_level, > + (cmdline_parse_inst_t *)&cmd_set_log_file, > + (cmdline_parse_inst_t *)&cmd_set_status, > + (cmdline_parse_inst_t *)&cmd_enumerate, > + (cmdline_parse_inst_t *)&cmd_bind, > + (cmdline_parse_inst_t *)&cmd_unbind, > + (cmdline_parse_inst_t *)&cmd_probe, > + (cmdline_parse_inst_t *)&cmd_remove, > + (cmdline_parse_inst_t *)&cmd_flash, > + (cmdline_parse_inst_t *)&cmd_pr, > + (cmdline_parse_inst_t *)&cmd_reboot, > + (cmdline_parse_inst_t *)&cmd_cancel, > + (cmdline_parse_inst_t *)&cmd_check, > + (cmdline_parse_inst_t *)&cmd_pci_read, > + (cmdline_parse_inst_t *)&cmd_pci_write, > + (cmdline_parse_inst_t *)&cmd_quit, > + (cmdline_parse_inst_t *)&cmd_help, > + NULL, > +}; > diff --git a/examples/ifpga/commands.h b/examples/ifpga/commands.h > new file mode 100644 > index 000000000..76c4c5025 > --- /dev/null > +++ b/examples/ifpga/commands.h > @@ -0,0 +1,16 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(c) 2020-2021 Intel Corporation > + */ > + > +#ifndef _COMMANDS_H_ > +#define _COMMANDS_H_ > + > +#include "ifpga_opae_api.h" > + > +extern cmdline_parse_ctx_t main_ctx[]; > + > +typedef struct { > + char s[38]; > +} uuid_str; > + > +#endif /* _COMMANDS_H_ */ > diff --git a/examples/ifpga/main.c b/examples/ifpga/main.c > new file mode 100644 > index 000000000..e9380d581 > --- /dev/null > +++ b/examples/ifpga/main.c > @@ -0,0 +1,38 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(c) 2020-2021 Intel Corporation > + */ > + > +#include > +#include > +#include > +#include > +#include > + > +#include > +#include > +#include > +#include > + > +#include > +#include > +#include > + > +#include "commands.h" > + > + > +int main(int argc, char **argv) > +{ > + struct cmdline *cl; > + int ret; > + > + ret =3D opae_init_eal(argc, argv); > + if (ret < 0) > + rte_panic("Cannot init EAL\n"); > + cl =3D cmdline_stdin_new(main_ctx, "opae> "); > + if (cl =3D=3D NULL) > + rte_panic("Cannot create cmdline instance\n"); > + cmdline_interact(cl); > + opae_cleanup_eal(); > + cmdline_stdin_exit(cl); > + return 0; > +} > diff --git a/examples/ifpga/meson.build b/examples/ifpga/meson.build > new file mode 100644 > index 000000000..9077a7bb2 > --- /dev/null > +++ b/examples/ifpga/meson.build > @@ -0,0 +1,19 @@ > +# SPDX-License-Identifier: BSD-3-Clause > +# Copyright(c) 2020-2021 Intel Corporation > + > +# meson file, for building this example as part of a main DPDK build. > +# > +# To build this example as a standalone application with an already- > installed > +# DPDK instance, use 'make' > + > +# require the raw_ifpga library > +build =3D dpdk_conf.has('RTE_RAW_IFPGA') > +if not build > + subdir_done() > +endif > + > +deps +=3D 'raw_ifpga' > +allow_experimental_apis =3D true > +sources =3D files( > + 'main.c', 'commands.c' > +) > -- > 2.29.2