From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 537E6A0564 for ; Fri, 12 Mar 2021 00:55:09 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 387334014D; Fri, 12 Mar 2021 00:55:09 +0100 (CET) Received: from mail-qt1-f178.google.com (mail-qt1-f178.google.com [209.85.160.178]) by mails.dpdk.org (Postfix) with ESMTP id 4EB664014D for ; Fri, 12 Mar 2021 00:55:08 +0100 (CET) Received: by mail-qt1-f178.google.com with SMTP id f12so2548682qtq.4 for ; Thu, 11 Mar 2021 15:55:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=AXVR4yLIMW6xX1nhIqFKvgT1bd6e6zEUFNTC+OYk3jE=; b=K72Jr5gc7JSBjmrob6UY+vwFFmn/IF6KxutyZey7a4Dat4YPuD1lYgJS1ITXZZm3ND Xm2ThchmnF6Gw1BV3rCh0SO0eUrzRmTFcUfhdpMlv1nbKMNt2e+AsSTHTKsDOPRtVHN3 FQFkinThu1O990AEOGkGMLs8hVgaf9EXle0FA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=AXVR4yLIMW6xX1nhIqFKvgT1bd6e6zEUFNTC+OYk3jE=; b=ace3IAK7lNjhAu3Rbl/SF5m03NTkcAD+iVzWpcv1LTDQgzRubGmRtIGJZUwH/bINls h4vrEzHSLt/06zAaWBqe43Vo53EIdaAYJgIE26ZceCUDMhVYnsIpcqHFJQHgRBIS68E8 e69Ithru4q/oIhXt4Lz+KXy+4JOil0B2wGZq55vR63n5nCvZGfb8K0YA117ArZrMtj7c km3vkxTlfuVzM3YuKPnlKnjCj8eAHfL54MqHQA3aNhyUtwlHj5GpU/XqbOMBKMNKGqLt kbdNLlVGWfrU9N2lxWLUGapyOltW7HWate4u2OLnJG5zTQIhWVONRhC8YpHHOCb91DPo xErA== X-Gm-Message-State: AOAM530xZDgWqdHZkOMlrzIfDekh0Z9lr/oem9BtcADr09tmZa8kNr/R 4CAMLSqLuYHpx9wj0pxv21G6sMs5TT18VRKCV7tSbA== X-Google-Smtp-Source: ABdhPJzR94k4JDiXs4ZRTez4wgS/1QsGY6iD8U+HqG67IIGM6Zb+E30OUZT/giH3GMA9YiirWPWz+FwvI3/BRUE0VtY= X-Received: by 2002:ac8:71d2:: with SMTP id i18mr9662581qtp.371.1615506907466; Thu, 11 Mar 2021 15:55:07 -0800 (PST) MIME-Version: 1.0 References: <20210311182819.27126-1-ajit.khaparde@broadcom.com> <20210311200458.40432-1-ajit.khaparde@broadcom.com> In-Reply-To: <20210311200458.40432-1-ajit.khaparde@broadcom.com> From: Ajit Khaparde Date: Thu, 11 Mar 2021 15:54:51 -0800 Message-ID: To: Lance Richardson Cc: dpdk-dev , Andrew Gospodarek , dpdk stable Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="0000000000006089c505bd4b834f" X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: Re: [dpdk-stable] [PATCH v3] net/bnxt: fix Rx descriptor status X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" --0000000000006089c505bd4b834f Content-Type: text/plain; charset="UTF-8" On Thu, Mar 11, 2021 at 12:05 PM Ajit Khaparde wrote: > > From: Lance Richardson > > Fix a number of issues in the bnxt receive descriptor status > function, including: > - Provide status of receive descriptor instead of completion > descriptor. > - Remove invalid comparison of raw ring index with masked ring > index. > - Correct misinterpretation of offset parameter as ring index. > - Correct misuse of completion ring index for mbuf ring (the > two rings have different sizes). > > Fixes: 0fe613bb87b2 ("net/bnxt: support Rx descriptor status") > Cc: stable@dpdk.org > > Signed-off-by: Lance Richardson > Reviewed-by: Andy Gospodarek > Reviewed-by: Ajit Khaparde > --- > v1->v2: rebase against latest tree. > v2->v3: fix compilation on PPC. Compile tested only. Patch applied to dpdk-next-net-brcm. Thanks > --- > drivers/net/bnxt/bnxt_ethdev.c | 110 ++++++++++++++++++++++++++------- > 1 file changed, 88 insertions(+), 22 deletions(-) > > diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c > index c55a2d8197..cefd6915d7 100644 > --- a/drivers/net/bnxt/bnxt_ethdev.c > +++ b/drivers/net/bnxt/bnxt_ethdev.c > @@ -3076,42 +3076,108 @@ bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id) > static int > bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset) > { > - struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue; > - struct bnxt_rx_ring_info *rxr; > + struct bnxt_rx_queue *rxq = rx_queue; > struct bnxt_cp_ring_info *cpr; > - struct rte_mbuf *rx_buf; > + struct bnxt_rx_ring_info *rxr; > + uint32_t desc, cons, raw_cons; > + struct bnxt *bp = rxq->bp; > struct rx_pkt_cmpl *rxcmp; > - uint32_t cons, cp_cons; > int rc; > > - if (!rxq) > - return -EINVAL; > - > - rc = is_bnxt_in_error(rxq->bp); > + rc = is_bnxt_in_error(bp); > if (rc) > return rc; > > - cpr = rxq->cp_ring; > - rxr = rxq->rx_ring; > - > if (offset >= rxq->nb_rx_desc) > return -EINVAL; > > - cons = RING_CMP(cpr->cp_ring_struct, offset); > - cp_cons = cpr->cp_raw_cons; > - rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons]; > + rxr = rxq->rx_ring; > + cpr = rxq->cp_ring; > > - if (cons > cp_cons) { > - if (CMPL_VALID(rxcmp, cpr->valid)) > - return RTE_ETH_RX_DESC_DONE; > - } else { > - if (CMPL_VALID(rxcmp, !cpr->valid)) > + /* > + * For the vector receive case, the completion at the requested > + * offset can be indexed directly. > + */ > +#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64) > + if (bp->flags & BNXT_FLAG_RX_VECTOR_PKT_MODE) { > + struct rx_pkt_cmpl *rxcmp; > + > + /* Check status of completion descriptor. */ > + raw_cons = cpr->cp_raw_cons + > + offset * CMP_LEN(CMPL_BASE_TYPE_RX_L2); > + cons = RING_CMP(cpr->cp_ring_struct, raw_cons); > + rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons]; > + > + if (CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct)) > return RTE_ETH_RX_DESC_DONE; > + > + /* Check whether rx desc has an mbuf attached. */ > + cons = RING_CMP(rxr->rx_ring_struct, raw_cons / 2); > + if (cons >= rxq->rxrearm_start && > + cons < rxq->rxrearm_start + rxq->rxrearm_nb) { > + return RTE_ETH_RX_DESC_UNAVAIL; > + } > + > + return RTE_ETH_RX_DESC_AVAIL; > } > - rx_buf = rxr->rx_buf_ring[cons]; > - if (rx_buf == NULL || rx_buf == &rxq->fake_mbuf) > - return RTE_ETH_RX_DESC_UNAVAIL; > +#endif > + > + /* > + * For the non-vector receive case, scan the completion ring to > + * locate the completion descriptor for the requested offset. > + */ > + raw_cons = cpr->cp_raw_cons; > + desc = 0; > + while (1) { > + uint32_t agg_cnt, cons, cmpl_type; > + > + cons = RING_CMP(cpr->cp_ring_struct, raw_cons); > + rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons]; > > + if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct)) > + break; > + > + cmpl_type = CMP_TYPE(rxcmp); > + > + switch (cmpl_type) { > + case CMPL_BASE_TYPE_RX_L2: > + case CMPL_BASE_TYPE_RX_L2_V2: > + if (desc == offset) { > + cons = rxcmp->opaque; > + if (rxr->rx_buf_ring[cons]) > + return RTE_ETH_RX_DESC_DONE; > + else > + return RTE_ETH_RX_DESC_UNAVAIL; > + } > + agg_cnt = BNXT_RX_L2_AGG_BUFS(rxcmp); > + raw_cons = raw_cons + CMP_LEN(cmpl_type) + agg_cnt; > + desc++; > + break; > + > + case CMPL_BASE_TYPE_RX_TPA_END: > + if (desc == offset) > + return RTE_ETH_RX_DESC_DONE; > + > + if (BNXT_CHIP_P5(rxq->bp)) { > + struct rx_tpa_v2_end_cmpl_hi *p5_tpa_end; > + > + p5_tpa_end = (void *)rxcmp; > + agg_cnt = BNXT_TPA_END_AGG_BUFS_TH(p5_tpa_end); > + } else { > + struct rx_tpa_end_cmpl *tpa_end; > + > + tpa_end = (void *)rxcmp; > + agg_cnt = BNXT_TPA_END_AGG_BUFS(tpa_end); > + } > + > + raw_cons = raw_cons + CMP_LEN(cmpl_type) + agg_cnt; > + desc++; > + break; > + > + default: > + raw_cons += CMP_LEN(cmpl_type); > + } > + } > > return RTE_ETH_RX_DESC_AVAIL; > } > -- > 2.21.1 (Apple Git-122.3) > --0000000000006089c505bd4b834f--