From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9205EA0524 for ; Mon, 3 May 2021 00:31:37 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 81EA440142; Mon, 3 May 2021 00:31:37 +0200 (CEST) Received: from mail-qt1-f174.google.com (mail-qt1-f174.google.com [209.85.160.174]) by mails.dpdk.org (Postfix) with ESMTP id 25A4740142 for ; Mon, 3 May 2021 00:31:36 +0200 (CEST) Received: by mail-qt1-f174.google.com with SMTP id 1so2512581qtb.0 for ; Sun, 02 May 2021 15:31:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=wcpQ29+8ymSMBX7YfvrSomIDT4/njtY22QZUwT81CaI=; b=UczEV+rWDlYDcYVL7KkgaQtksWffYoES2fCuRejL8oZsW/B9421ca9+Xrmeh98e3tt 64OiUuMZt6fi6hCbI1SkSWdQi4QwmyZo5LF485omq4PD9SFrRd+FV8Kuu7dioaMj477Y tsarz1lLxlxBFRBySFVT5CQDfMQyE+26j2KIE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=wcpQ29+8ymSMBX7YfvrSomIDT4/njtY22QZUwT81CaI=; b=fJU57Bg/g0JIcEqtD5OezOQYq02jKA5TjhNyv612A+rmuyqrBzy6hREkw7jx4CfVvt fytge0VzFTCvW8dcgZ7dmYbIgKy6fJuCKD+eU0jwi1hRp8vMLHkybqGVTgDFTEDVBh8g ldKyBEOP0VNsimCA4+A88FE5h55QJmLnGVyKD4gfHgTtEsQ/cjDFQ7WJ5PIuP4ngOCAI LnsA+Fa6d/ajJMGXP+ufATOZGEkmmRAhx1pn2ZVB8xciDCjEw9zjP5Tu3GABYMlEmH3u +fHBvLUEXeSZw2K5Zs6+9PdOMrY7F/pAqJFpqEjJhWnENr7dxi2u+KkotN5eOIxz+29n 05LA== X-Gm-Message-State: AOAM530how3y7OHTophdPRa5ftasigXjA57cTJQjKxdjMzWPulRrG28p V7ZM83i1LG7WZFMNj7p0NYb44H+5U0n1hShtkMoZNw== X-Google-Smtp-Source: ABdhPJxZt0u3V7Vd7IGtfqvwz0I8cmiS75RseYN8w9yKvPmqFhKRL1AeLrFckkYHplqjkvJ3LoUGUve0RtNBYnC/mX0= X-Received: by 2002:ac8:6f4c:: with SMTP id n12mr14830277qtv.22.1619994695458; Sun, 02 May 2021 15:31:35 -0700 (PDT) MIME-Version: 1.0 References: <20210426060755.12821-1-somnath.kotur@broadcom.com> <20210426060755.12821-2-somnath.kotur@broadcom.com> In-Reply-To: <20210426060755.12821-2-somnath.kotur@broadcom.com> From: Ajit Khaparde Date: Sun, 2 May 2021 15:31:19 -0700 Message-ID: To: Somnath Kotur Cc: dpdk-dev , Ferruh Yigit , dpdk stable Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="000000000000614ebd05c16068bc" X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: Re: [dpdk-stable] [PATCH 2/2] net/bnxt: fix Rx FIFO pending bit X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" --000000000000614ebd05c16068bc Content-Type: text/plain; charset="UTF-8" On Sun, Apr 25, 2021 at 11:09 PM Somnath Kotur wrote: > Fix to clear the Rx FIFO while reading the timestamp. > If the Rx FIFO has pending bit set, keep reading to clear it > and return the last valid timestamp instead of unconditionally > returning an error. > > Fixes: b11cceb83a34 ("net/bnxt: support timesync") > Cc: stable@dpdk.org > > Signed-off-by: Somnath Kotur > Reviewed-by: Ajit Khaparde > Patch applied to dpdk-next-net-brcm. Thanks > --- > drivers/net/bnxt/bnxt.h | 1 + > drivers/net/bnxt/bnxt_ethdev.c | 38 ++++++++++++++++++++++++++++++---- > 2 files changed, 35 insertions(+), 4 deletions(-) > > diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h > index dfdfa9f7a0..8f3ae41911 100644 > --- a/drivers/net/bnxt/bnxt.h > +++ b/drivers/net/bnxt/bnxt.h > @@ -306,6 +306,7 @@ struct rte_flow { > struct bnxt_vnic_info *vnic; > }; > > +#define BNXT_PTP_RX_PND_CNT 10 > #define BNXT_PTP_FLAGS_PATH_TX 0x0 > #define BNXT_PTP_FLAGS_PATH_RX 0x1 > #define BNXT_PTP_FLAGS_CURRENT_TIME 0x2 > diff --git a/drivers/net/bnxt/bnxt_ethdev.c > b/drivers/net/bnxt/bnxt_ethdev.c > index f5d2dc8590..eb81bf3991 100644 > --- a/drivers/net/bnxt/bnxt_ethdev.c > +++ b/drivers/net/bnxt/bnxt_ethdev.c > @@ -3388,6 +3388,38 @@ static int bnxt_get_tx_ts(struct bnxt *bp, uint64_t > *ts) > return 0; > } > > +static int bnxt_clr_rx_ts(struct bnxt *bp, uint64_t *last_ts) > +{ > + struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; > + struct bnxt_pf_info *pf = bp->pf; > + uint16_t port_id; > + int i = 0; > + uint32_t fifo; > + > + if (!ptp || (bp->flags & BNXT_FLAG_CHIP_P5)) > + return -EINVAL; > + > + port_id = pf->port_id; > + fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 + > + ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO])); > + while ((fifo & BNXT_PTP_RX_FIFO_PENDING) && (i < > BNXT_PTP_RX_PND_CNT)) { > + rte_write32(1 << port_id, (uint8_t *)bp->bar0 + > + ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO_ADV]); > + fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 + > + > ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO])); > + *last_ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 > + > + > ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L])); > + *last_ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t > *)bp->bar0 + > + > ptp->rx_mapped_regs[BNXT_PTP_RX_TS_H])) << 32; > + i++; > + } > + > + if (i >= BNXT_PTP_RX_PND_CNT) > + return -EBUSY; > + > + return 0; > +} > + > static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t *ts) > { > struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; > @@ -3406,10 +3438,8 @@ static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t > *ts) > > fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 + > ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO])); > - if (fifo & BNXT_PTP_RX_FIFO_PENDING) { > -/* bnxt_clr_rx_ts(bp); TBD */ > - return -EBUSY; > - } > + if (fifo & BNXT_PTP_RX_FIFO_PENDING) > + return bnxt_clr_rx_ts(bp, ts); > > *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 + > ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L])); > -- > 2.28.0.497.g54e85e7 > > --000000000000614ebd05c16068bc--