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From: Jerin Jacob <jerinjacobk@gmail.com>
To: Kiran Kumar K <kirankumark@marvell.com>,
	Ferruh Yigit <ferruh.yigit@intel.com>
Cc: Jerin Jacob <jerinj@marvell.com>,
	Nithin Dabilpuram <ndabilpuram@marvell.com>,
	dpdk-dev <dev@dpdk.org>,  dpdk stable <stable@dpdk.org>
Subject: Re: [dpdk-stable] [dpdk-dev] [PATCH v3] net/octeontx2: fix PTP and HIGIG2 coexistence
Date: Tue, 14 Jan 2020 19:37:27 +0530	[thread overview]
Message-ID: <CALBAE1NVFOuETg3hEEqwNOyHOwMZd74PS=FZ0O7aQQx+aJXbpg@mail.gmail.com> (raw)
In-Reply-To: <20200114092622.13944-1-kirankumark@marvell.com>

On Tue, Jan 14, 2020 at 2:57 PM <kirankumark@marvell.com> wrote:
>
> From: Kiran Kumar K <kirankumark@marvell.com>
>
> octeontx2 PMD does not support both PTP and HIGIG2 together.
> added a check to enforce this and updated the Rx offload capabilities when
> Higig2 mode enabled
>
> fixes: 602009ee2dfb (net/octeontx2: support HIGIG2)
>
> Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>

Acked-by: Jerin Jacob <jerinj@marvell.com>

Fixed the ./devtools/check-git-log.sh issues.
Applied to dpdk-next-net-mrvl/master. Thanks


> ---
> V3 Changes:
> * Fixed commit log
>
> V2 Chanhes:
> * Fixed error message
>
>  drivers/net/octeontx2/otx2_ethdev.c | 9 ++++++++-
>  drivers/net/octeontx2/otx2_ptp.c    | 5 +++++
>  2 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
> index ed329273d..2e91a5ab7 100644
> --- a/drivers/net/octeontx2/otx2_ethdev.c
> +++ b/drivers/net/octeontx2/otx2_ethdev.c
> @@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev)
>  {
>         uint64_t capa = NIX_RX_OFFLOAD_CAPA;
>
> -       if (otx2_dev_is_vf(dev))
> +       if (otx2_dev_is_vf(dev) ||
> +           dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG)
>                 capa &= ~DEV_RX_OFFLOAD_TIMESTAMP;
>
>         return capa;
> @@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
>                 goto fail_offloads;
>         }
>
> +       if (dev->ptp_en &&
> +           dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
> +               otx2_err("Both PTP and switch header enabled");
> +               goto free_nix_lf;
> +       }
> +
>         rc = nix_lf_switch_header_type_enable(dev);
>         if (rc) {
>                 otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
> diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
> index f34b9339c..ae5a2b7cd 100644
> --- a/drivers/net/octeontx2/otx2_ptp.c
> +++ b/drivers/net/octeontx2/otx2_ptp.c
> @@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
>                 return -EINVAL;
>         }
>
> +       if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
> +               otx2_err("Both PTP and switch header enabled");
> +               return -EINVAL;
> +       }
> +
>         /* Allocating a iova address for tx tstamp */
>         const struct rte_memzone *ts;
>         ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",
> --
> 2.17.1
>

      reply	other threads:[~2020-01-14 14:07 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20200114082854.13198-1-kirankumark@marvell.com>
2020-01-14  9:26 ` kirankumark
2020-01-14 14:07   ` Jerin Jacob [this message]

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