patches for DPDK stable branches
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From: "Xueming(Steven) Li" <xuemingl@nvidia.com>
To: 谢华伟(此时此刻) <huawei.xhw@alibaba-inc.com>,
	"stable@dpdk.org" <stable@dpdk.org>,
	Luca Boccassi <bluca@debian.org>,
	Kevin Traynor <ktraynor@redhat.com>
Cc: "david.marchand@redhat.com" <david.marchand@redhat.com>,
	"maxime.coquelin@redhat.com" <maxime.coquelin@redhat.com>,
	"ferruh.yigit@intel.com" <ferruh.yigit@intel.com>,
	"grive@u256.net" <grive@u256.net>,
	"heqing.zhu@intel.com" <heqing.zhu@intel.com>
Subject: Re: [dpdk-stable] [PATCH 20.11 0/2] support both PIO and MMIO BAR for legacy virito device
Date: Sun, 20 Jun 2021 15:02:39 +0000
Message-ID: <DM4PR12MB5373A2ABF3069C307B2728FCA10B9@DM4PR12MB5373.namprd12.prod.outlook.com> (raw)
In-Reply-To: <1623912892-108014-1-git-send-email-huawei.xhw@alibaba-inc.com>

Hi Huawei,

Thanks for the backport! Here is the backport policy:
https://doc.dpdk.org/guides/contributing/stable.html#what-changes-should-be-backported

The patch set is small enough, but it changed the public PCI component, a little risky IMHO.

BTW, the patch subject seems different than upstream version, why not use upstream patch?
We are expecting a line of "[ upstream commit <id> ] at begging of path commit log.

Best Regards,
Xueming

> -----Original Message-----
> From: stable <stable-bounces@dpdk.org> On Behalf Of 谢华伟(此时此刻)
> Sent: Thursday, June 17, 2021 2:55 PM
> To: stable@dpdk.org
> Cc: david.marchand@redhat.com; maxime.coquelin@redhat.com; ferruh.yigit@intel.com; grive@u256.net; heqing.zhu@intel.com; 谢
> 华伟(此时此刻) <huawei.xhw@alibaba-inc.com>
> Subject: [dpdk-stable] [PATCH 20.11 0/2] support both PIO and MMIO BAR for legacy virito device
> 
> virtio PMD assumes legacy device only supports PIO(port-mapped) BAR resource. This is wrong. As we need to create lots of devices,
> adn PIO resource on x86 is very limited, we expose MMIO(memory-mapped I/O) BAR.
> 
> Kernel supports both PIO and MMIO BAR for legacy virtio-pci device, and for all other pci devices. This patchset handles different type
> of BAR in the similar way.
> 
> In previous implementation, under igb_uio driver we get PIO address from igb_uio sysfs entry; with uio_pci_generic, we get PIO
> address from /proc/ioports for x86, and for other ARCHs, we get PIO address from standard PCI sysfs entry. For PIO/MMIO RW, there
> is different path for different drivers and arch.
> 
> All of the above is too much twisted. This patchset unifies the way to get both PIO and MMIO address for different driver and ARCHs,
> all from standard resource attr under pci sysfs. This is most generic.
> 
> We distinguish PIO and MMIO by their address range like how kernel does.
> It is ugly but works.
> 
> huawei xie (2):
>   bus/pci: use PCI standard sysfs entry to get PIO address
>   bus/pci: support MMIO in PCI ioport accessors
> 
>  drivers/bus/pci/linux/pci.c     |  81 ---------------
>  drivers/bus/pci/linux/pci_uio.c | 214 ++++++++++++++++++++++++++++------------
>  2 files changed, 150 insertions(+), 145 deletions(-)
> 
> --
> 1.8.3.1


  parent reply	other threads:[~2021-06-20 15:02 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-17  6:54 谢华伟(此时此刻)
2021-06-17  6:54 ` [dpdk-stable] [PATCH 20.11 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-06-17  6:54 ` [dpdk-stable] [PATCH 20.11 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-06-20 15:02 ` Xueming(Steven) Li [this message]
2021-06-22  7:38   ` [dpdk-stable] [PATCH 20.11 0/2] support both PIO and MMIO BAR for legacy virito device Thomas Monjalon

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