From: Matan Azrad <matan@nvidia.com>
To: Slava Ovsiienko <viacheslavo@nvidia.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: Raslan Darawsheh <rasland@nvidia.com>, Ori Kam <orika@nvidia.com>,
"stable@dpdk.org" <stable@dpdk.org>
Subject: Re: [dpdk-stable] [PATCH] net/mlx5: fix Rx metadata leftovers
Date: Thu, 11 Mar 2021 19:58:10 +0000 [thread overview]
Message-ID: <MW2PR12MB2492F9B4534E682170B6E1F9DF909@MW2PR12MB2492.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20210307114547.19591-1-viacheslavo@nvidia.com>
From: Viacheslav Ovsiienko
> The Rx metadata might use the metadata register C0 to keep the values. The
> same register C0 might be used by kernel for source vport value handling,
> kernel uses upper half of the register, leaving the lower half for application
> usage.
>
> In the extended metadata mode 1 (dv_xmeta_en devarg is assigned with value
> 1) the metadata width is 16 bits only, the Rx datapath code fetched the entire
> 32-bit value of the metadata register and presented one to application. The
> patch provides data masking depending on the chosen metadata mode.
>
> Fixes: 6c55b622a956 ("net/mlx5: set dynamic flow metadata in Rx queues")
> Cc: stable@dpdk.org
>
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
next prev parent reply other threads:[~2021-03-11 19:58 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-07 11:45 Viacheslav Ovsiienko
2021-03-11 19:58 ` Matan Azrad [this message]
2021-03-16 16:15 ` Raslan Darawsheh
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