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Mon, 30 Sep 2024 13:29:09 +0000 From: "Stokes, Ian" To: "Richardson, Bruce" , "dev@dpdk.org" CC: "Richardson, Bruce" , "stable@dpdk.org" Subject: RE: [PATCH 2/4] net/ice: fix AVX-512 pointer copy on 32-bit Thread-Topic: [PATCH 2/4] net/ice: fix AVX-512 pointer copy on 32-bit Thread-Index: AQHbAGbU9wJvJtUlJ0m3iApyp4+eYrJweIIw Date: Mon, 30 Sep 2024 13:29:09 +0000 Message-ID: References: <20240906141127.628873-1-bruce.richardson@intel.com> <20240906141127.628873-3-bruce.richardson@intel.com> In-Reply-To: <20240906141127.628873-3-bruce.richardson@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: MW6PR11MB8309:EE_|DM6PR11MB4689:EE_ x-ms-office365-filtering-correlation-id: 90eee08a-f0d9-41f9-357f-08dce153ddc2 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none x-ms-exchange-crosstenant-authas: Internal x-ms-exchange-crosstenant-authsource: MW6PR11MB8309.namprd11.prod.outlook.com x-ms-exchange-crosstenant-network-message-id: 90eee08a-f0d9-41f9-357f-08dce153ddc2 x-ms-exchange-crosstenant-originalarrivaltime: 30 Sep 2024 13:29:09.8190 (UTC) x-ms-exchange-crosstenant-fromentityheader: Hosted x-ms-exchange-crosstenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d x-ms-exchange-crosstenant-mailboxtype: HOSTED x-ms-exchange-crosstenant-userprincipalname: uSOW44ccx0Ga2H4H5nT1L7KOLejfTOlYmPhQo2qCF5UIScaTUM31185VmlNcMjO5OwVMWa9mTD91NPK/LHiGqA== x-ms-exchange-transport-crosstenantheadersstamped: DM6PR11MB4689 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: intel.com X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org > The size of a pointer on 32-bit is only 4 rather than 8 bytes, so > copying 32 pointers only requires half the number of AVX-512 load store > operations. > > Fixes: a4e480de268e ("net/ice: optimize Tx by using AVX512") > Cc: stable@dpdk.org > > Signed-off-by: Bruce Richardson > --- > drivers/net/ice/ice_rxtx_vec_avx512.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/net/ice/ice_rxtx_vec_avx512.c > b/drivers/net/ice/ice_rxtx_vec_avx512.c > index 04148e8ea2..add095ef06 100644 > --- a/drivers/net/ice/ice_rxtx_vec_avx512.c > +++ b/drivers/net/ice/ice_rxtx_vec_avx512.c > @@ -907,6 +907,7 @@ ice_tx_free_bufs_avx512(struct ice_tx_queue *txq) > uint32_t copied =3D 0; > /* n is multiple of 32 */ > while (copied < n) { > +#ifdef RTE_ARCH_64 > const __m512i a =3D > _mm512_loadu_si512(&txep[copied]); > const __m512i b =3D _mm512_loadu_si512(&txep[copied > + 8]); > const __m512i c =3D _mm512_loadu_si512(&txep[copied= + > 16]); > @@ -916,6 +917,12 @@ ice_tx_free_bufs_avx512(struct ice_tx_queue *txq) > _mm512_storeu_si512(&cache_objs[copied + 8], b); > _mm512_storeu_si512(&cache_objs[copied + 16], c); > _mm512_storeu_si512(&cache_objs[copied + 24], d); > +#else > + const __m512i a =3D > _mm512_loadu_si512(&txep[copied]); > + const __m512i b =3D _mm512_loadu_si512(&txep[copied > + 16]); > + _mm512_storeu_si512(&cache_objs[copied], a); > + _mm512_storeu_si512(&cache_objs[copied + 16], b); > +#endif > copied +=3D 32; > } > cache->len +=3D n; > -- LGTM, Acked. Thanks Ian