From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 8B395A05D3 for ; Wed, 27 Mar 2019 12:51:43 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6FC451B205; Wed, 27 Mar 2019 12:51:43 +0100 (CET) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by dpdk.org (Postfix) with ESMTP id 9E8A01B1F6; Wed, 27 Mar 2019 12:51:38 +0100 (CET) Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 05F3C307D943; Wed, 27 Mar 2019 11:51:38 +0000 (UTC) Received: from [10.36.116.242] (ovpn-116-242.ams2.redhat.com [10.36.116.242]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6D1465D9C5; Wed, 27 Mar 2019 11:51:32 +0000 (UTC) To: Yongseok Koh , shahafs@mellanox.com Cc: dev@dpdk.org, stable@dpdk.org References: <20190325191310.20594-1-yskoh@mellanox.com> From: Kevin Traynor Message-ID: Date: Wed, 27 Mar 2019 11:51:30 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.0 MIME-Version: 1.0 In-Reply-To: <20190325191310.20594-1-yskoh@mellanox.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Wed, 27 Mar 2019 11:51:38 +0000 (UTC) Subject: Re: [dpdk-stable] [dpdk-dev] [PATCH] net/mlx5: revert mbuf address calculation for x86 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" On 25/03/2019 19:13, Yongseok Koh wrote: > When replenishing mbufs on Rx, buffer address (mbuf->buf_addr) should be > loaded. non-x86 processors (mostly RISC such as ARM and Power) are more > vulnerable to load stall. For x86, reducing the number of instructions > seems to matter most. > > For x86, this is simply a load but for other architectures, it is > calculated from the address of mbuf structure by rte_mbuf_buf_addr() > without having to load the first cacheline of the mbuf. > Hi Yongseok, > Fixes: 12d468a62bc1 ("net/mlx5: fix instruction hotspot on replenishing Rx buffer") A similar backport was just added into 18.11.1-RC2, should it be reverted? I'm not keen to put another fix for it in for 18.11.1 at this stage, I think it can be part of 18.11.2. WDYT? thanks, Kevin. > Cc: stable@dpdk.org > > Signed-off-by: Yongseok Koh > --- > drivers/net/mlx5/mlx5_rxtx_vec.h | 14 +++++++++++++- > 1 file changed, 13 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/mlx5/mlx5_rxtx_vec.h b/drivers/net/mlx5/mlx5_rxtx_vec.h > index 5df8e291e6..4220b08dd2 100644 > --- a/drivers/net/mlx5/mlx5_rxtx_vec.h > +++ b/drivers/net/mlx5/mlx5_rxtx_vec.h > @@ -102,9 +102,21 @@ mlx5_rx_replenish_bulk_mbuf(struct mlx5_rxq_data *rxq, uint16_t n) > return; > } > for (i = 0; i < n; ++i) { > - void *buf_addr = rte_mbuf_buf_addr(elts[i], rxq->mp); > + void *buf_addr; > > + /* > + * Load the virtual address for Rx WQE. non-x86 processors > + * (mostly RISC such as ARM and Power) are more vulnerable to > + * load stall. For x86, reducing the number of instructions > + * seems to matter most. > + */ > +#ifdef RTE_ARCH_X86_64 > + buf_addr = elts[i]->buf_addr; > + assert(buf_addr == rte_mbuf_buf_addr(elts[i], rxq->mp)); > +#else > + buf_addr = rte_mbuf_buf_addr(elts[i], rxq->mp); > assert(buf_addr == elts[i]->buf_addr); > +#endif > wq[i].addr = rte_cpu_to_be_64((uintptr_t)buf_addr + > RTE_PKTMBUF_HEADROOM); > /* If there's only one MR, no need to replace LKey in WQE. */ >