From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 61341A0C41 for ; Fri, 8 Oct 2021 08:09:43 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 039B840040; Fri, 8 Oct 2021 08:09:43 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mails.dpdk.org (Postfix) with ESMTP id D802240040; Fri, 8 Oct 2021 08:09:41 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10130"; a="206562196" X-IronPort-AV: E=Sophos;i="5.85,356,1624345200"; d="scan'208";a="206562196" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Oct 2021 23:09:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,356,1624345200"; d="scan'208";a="561202193" Received: from fmsmsx603.amr.corp.intel.com ([10.18.126.83]) by FMSMGA003.fm.intel.com with ESMTP; 07 Oct 2021 23:09:40 -0700 Received: from shsmsx606.ccr.corp.intel.com (10.109.6.216) by fmsmsx603.amr.corp.intel.com (10.18.126.83) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Thu, 7 Oct 2021 23:09:40 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX606.ccr.corp.intel.com (10.109.6.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Fri, 8 Oct 2021 14:09:38 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.2242.012; Fri, 8 Oct 2021 14:09:37 +0800 From: "Zhang, Qi Z" To: "Guo, Junfeng" , "Wu, Jingjing" , "Xing, Beilei" CC: "dev@dpdk.org" , "Yigit, Ferruh" , "stable@dpdk.org" Thread-Topic: [PATCH v3] net/iavf: fix QFI field bit check for GTPU EH Thread-Index: AQHXu/AKX49mlhLn5kyFeGU5ksS9f6vInhOQ Date: Fri, 8 Oct 2021 06:09:37 +0000 Message-ID: References: <20210929123134.1465507-1-junfeng.guo@intel.com> <20211008104143.236289-1-junfeng.guo@intel.com> In-Reply-To: <20211008104143.236289-1-junfeng.guo@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.6.200.16 dlp-product: dlpe-windows x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-stable] [PATCH v3] net/iavf: fix QFI field bit check for GTPU EH X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" > -----Original Message----- > From: Guo, Junfeng > Sent: Friday, October 8, 2021 6:42 PM > To: Zhang, Qi Z ; Wu, Jingjing ; > Xing, Beilei > Cc: dev@dpdk.org; Yigit, Ferruh ; Guo, Junfeng > ; stable@dpdk.org > Subject: [PATCH v3] net/iavf: fix QFI field bit check for GTPU EH >=20 > If GTPU Extionsion header has no pdu_type setting, the parsed value of > gtp_psc_spec->hdr.type will be 0, which is same as IAVF_GTPU_EH_DWLINK. > Thus, for this case, we should check gtp_psc_mask->hdr.type instead, to s= et > QFI field bit of GTPU_EH first. >=20 > Fixes: cd212c466992 ("net/iavf: fix QFI fields of GTPU UL/DL for flow dir= ector") > Cc: stable@dpdk.org >=20 > Signed-off-by: Junfeng Guo Acked-by: Qi Zhang Applied to dpdk-next-net-intel. Thanks Qi