From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D869FA0A0E for ; Tue, 27 Apr 2021 18:42:37 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C6A384114A; Tue, 27 Apr 2021 18:42:37 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id DCF334003E; Tue, 27 Apr 2021 18:42:34 +0200 (CEST) IronPort-SDR: FQmonIwhj2BOfctlu1o8yRvdWQ+NWPZRrmZOLec/9lJ6RTQHnWTM3bs/e7jgive3NJuiSJDlhJ eP2XBaZ9kHOA== X-IronPort-AV: E=McAfee;i="6200,9189,9967"; a="257850945" X-IronPort-AV: E=Sophos;i="5.82,254,1613462400"; d="scan'208";a="257850945" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2021 09:42:32 -0700 IronPort-SDR: b+mgYGUoTqS/Cerv6KyTMbw2+RDcVi3Goa8ZM9X/qvpyNLMs34EEWXL6CU6oI39NoLyDXWjsaC bLsbg2Se5SCw== X-IronPort-AV: E=Sophos;i="5.82,254,1613462400"; d="scan'208";a="457733999" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.221.231]) ([10.213.221.231]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2021 09:42:31 -0700 To: Jiawen Wu , dev@dpdk.org Cc: stable@dpdk.org References: <20210425080347.20376-1-jiawenwu@trustnetic.com> <20210425080347.20376-2-jiawenwu@trustnetic.com> From: Ferruh Yigit X-User: ferruhy Message-ID: Date: Tue, 27 Apr 2021 17:42:26 +0100 MIME-Version: 1.0 In-Reply-To: <20210425080347.20376-2-jiawenwu@trustnetic.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-stable] [PATCH 1/4] net/txgbe: fix RSS in double VALN X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" On 4/25/2021 9:03 AM, Jiawen Wu wrote: > Regard QINQ as one case of extend VLAN, and always enable QINQ mode when > double VLAN is set, to avoid RSS does not work for QINQ packets. > It is hard to understand above paragraph, can you please reword it? Also in the patch title s/VALN/VLAN VLAN_EXTEND mainly comes from ixgbe, it is different than QinQ, which one does your device supports? > Fixes: 220b0e49bc47 ("net/txgbe: support VLAN") > Cc: stable@dpdk.org > > Signed-off-by: Jiawen Wu > --- > drivers/net/txgbe/txgbe_ethdev.c | 12 ++++-------- > 1 file changed, 4 insertions(+), 8 deletions(-) > > diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c > index 97796f040b..87c041c2ec 100644 > --- a/drivers/net/txgbe/txgbe_ethdev.c > +++ b/drivers/net/txgbe/txgbe_ethdev.c > @@ -1217,17 +1217,12 @@ static void > txgbe_vlan_hw_extend_enable(struct rte_eth_dev *dev) > { > struct txgbe_hw *hw = TXGBE_DEV_HW(dev); > - struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; > - struct rte_eth_txmode *txmode = &dev->data->dev_conf.txmode; > uint32_t ctrl; > > PMD_INIT_FUNC_TRACE(); > > ctrl = rd32(hw, TXGBE_PORTCTL); > - ctrl |= TXGBE_PORTCTL_VLANEXT; > - if (rxmode->offloads & DEV_RX_OFFLOAD_QINQ_STRIP || > - txmode->offloads & DEV_TX_OFFLOAD_QINQ_INSERT) > - ctrl |= TXGBE_PORTCTL_QINQ; > + ctrl |= TXGBE_PORTCTL_VLANEXT | TXGBE_PORTCTL_QINQ; > wr32(hw, TXGBE_PORTCTL, ctrl); > } > > @@ -1287,8 +1282,9 @@ txgbe_vlan_offload_config(struct rte_eth_dev *dev, int mask) > txgbe_vlan_hw_filter_disable(dev); > } > > - if (mask & ETH_VLAN_EXTEND_MASK) { > - if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND) > + if (mask & (ETH_VLAN_EXTEND_MASK | ETH_QINQ_STRIP_MASK)) { > + if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND || > + rxmode->offloads & DEV_RX_OFFLOAD_QINQ_STRIP) > txgbe_vlan_hw_extend_enable(dev); > else > txgbe_vlan_hw_extend_disable(dev); >