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From: qemudev@loongson.cn
To: test-report@dpdk.org
Cc: Nithin Dabilpuram <ndabilpuram@marvell.com>, zhoumin@loongson.cn
Subject: |WARNING| pw128139 [PATCH] net/cnxk: add support for reassembly of multi-seg pkts
Date: Mon, 5 Jun 2023 20:25:19 +0800	[thread overview]
Message-ID: <202306051225.355CPJKB3604793@localhost.localdomain> (raw)
In-Reply-To: <20230605121552.473601-1-ndabilpuram@marvell.com>

Test-Label: loongarch-compilation
Test-Status: WARNING
http://dpdk.org/patch/128139

_apply patch failure_

Submitter: Nithin Dabilpuram <ndabilpuram@marvell.com>
Date: Mon, 5 Jun 2023 17:45:51 +0530
DPDK git baseline: Repo:dpdk
  Branch: main
  CommitID: abaa473297cf21cb81e5348185a7694ae2f221e7

Apply patch set 128139 failed:

Checking patch drivers/event/cnxk/cn10k_worker.h...
Hunk #2 succeeded at 27 (offset 3 lines).
Hunk #3 succeeded at 62 (offset 3 lines).
Hunk #4 succeeded at 126 (offset 3 lines).
Hunk #5 succeeded at 155 (offset 3 lines).
Hunk #6 succeeded at 167 (offset 3 lines).
Hunk #7 succeeded at 177 (offset -5 lines).
error: while searching for:
			sa_base = cnxk_nix_sa_base_get(port, ws->lookup_mem);
			sa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);

			mbuf = (uint64_t)nix_sec_meta_to_mbuf_sc(
				cq_w1, cq_w5, sa_base, (uintptr_t)&iova, &loff,
				(struct rte_mbuf *)mbuf, d_off, flags,
				mbuf_init | ((uint64_t)port) << 48);
			mp = (struct rte_mempool *)cnxk_nix_inl_metapool_get(port, lookup_mem);
			meta_aura = mp ? mp->pool_id : m->pool->pool_id;

			if (loff)
				roc_npa_aura_op_free(meta_aura, 0, iova);

error: patch failed: drivers/event/cnxk/cn10k_worker.h:192
error: drivers/event/cnxk/cn10k_worker.h: patch does not apply
Checking patch drivers/net/cnxk/cn10k_rx.h...
error: while searching for:
		/* Mark frag as get */
		RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);

		cnxk_ip_reassembly_dynfield(mbuf, off)->nb_frags =
			hdr->w0.num_frags - 2;
		cnxk_ip_reassembly_dynfield(mbuf, off)->next_frag = NULL;
		cnxk_ip_reassembly_dynfield(mbuf_prev, off)->next_frag = mbuf;
		mbuf_prev = mbuf;
	}

	/* Frag-2: */
	if (hdr->w0.num_frags > 2) {
		frag_ptr = (uint64_t *)(finfo + 1);
		wqe = (uint64_t *)(rte_be_to_cpu_64(*frag_ptr));
		rlen = ((*(wqe + 10)) >> 16) & 0xFFFF;

		frag_rx = (union nix_rx_parse_u *)(wqe + 1);
		frag_size = rlen + frag_rx->lcptr - frag_rx->laptr;
		frag_rx->pkt_lenm1 = frag_size - 1;

		mbuf = (struct rte_mbuf *)((uintptr_t)wqe -
				sizeof(struct rte_mbuf));
		*(uint64_t *)(&mbuf->rearm_data) = mbuf_init;
		mbuf->data_len = frag_size;
		mbuf->pkt_len = frag_size;
		mbuf->ol_flags = ol_flags;
		mbuf->next = NULL;

		/* Update dynamic field with userdata */
		*rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;

		/* Mark frag as get */
		RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);

		cnxk_ip_reassembly_dynfield(mbuf, off)->nb_frags =
			hdr->w0.num_frags - 3;
		cnxk_ip_reassembly_dynfield(mbuf, off)->next_frag = NULL;
		cnxk_ip_reassembly_dynfield(mbuf_prev, off)->next_frag = mbuf;
		mbuf_prev = mbuf;
	}

	/* Frag-3: */
	if (hdr->w0.num_frags > 3) {
		wqe = (uint64_t *)(rte_be_to_cpu_64(*(frag_ptr + 1)));
		rlen = ((*(wqe + 10)) >> 16) & 0xFFFF;

		frag_rx = (union nix_rx_parse_u *)(wqe + 1);
		frag_size = rlen + frag_rx->lcptr - frag_rx->laptr;
		frag_rx->pkt_lenm1 = frag_size - 1;

		mbuf = (struct rte_mbuf *)((uintptr_t)wqe -
				sizeof(struct rte_mbuf));
		*(uint64_t *)(&mbuf->rearm_data) = mbuf_init;
		mbuf->data_len = frag_size;
		mbuf->pkt_len = frag_size;
		mbuf->ol_flags = ol_flags;
		mbuf->next = NULL;

		/* Mark frag as get */
		RTE_MEMPOOL_CHECK_COOKIES(mbuf->pool, (void **)&mbuf, 1, 1);

		/* Update dynamic field with userdata */
		*rte_security_dynfield(mbuf) = (uint64_t)inb_priv->userdata;

		cnxk_ip_reassembly_dynfield(mbuf, off)->nb_frags =
			hdr->w0.num_frags - 4;
		cnxk_ip_reassembly_dynfield(mbuf, off)->next_frag = NULL;
		cnxk_ip_reassembly_dynfield(mbuf_prev, off)->next_frag = mbuf;
	}
	return head;
}

static struct rte_mbuf *
nix_sec_reassemble_frags(const struct cpt_parse_hdr_s *hdr, uint64_t cq_w1,
			uint64_t cq_w5, uint64_t mbuf_init)
{
	uint32_t fragx_sum, pkt_hdr_len, l3_hdr_size;
	uint32_t offset = hdr->w2.fi_offset;
	union nix_rx_parse_u *inner_rx;
	uint16_t rlen, data_off, b_off;
	union nix_rx_parse_u *frag_rx;
	struct cpt_frag_info_s *finfo;
	struct rte_mbuf *head, *mbuf;
	uint64_t *frag_ptr = NULL;
	rte_iova_t *inner_iova;
	uint16_t frag_size;
	uint64_t *wqe;

	/* Base data offset */
	b_off = mbuf_init & 0xFFFFUL;
	mbuf_init &= ~0xFFFFUL;

	/* offset of 0 implies 256B, otherwise it implies offset*8B */
	offset = (((offset - 1) & 0x1f) + 1) * 8;
	finfo = RTE_PTR_ADD(hdr, offset);

	/* Frag-0: */
	wqe = (uint64_t *)rte_be_to_cpu_64(hdr->wqe_ptr);
	inner_rx = (union nix_rx_parse_u *)(wqe + 1);
	inner_iova = (rte_iova_t *)*(wqe + 9);

	/* Update only the upper 28-bits from meta pkt parse info */
	*((uint64_t *)inner_rx) = ((*((uint64_t *)inner_rx) & ((1ULL << 36) - 1)) |
				(cq_w1 & ~((1ULL << 36) - 1)));

	rlen = ((*(wqe + 10)) >> 16) & 0xFFFF;
	frag_size = rlen + ((cq_w5 >> 16) & 0xFF) - (cq_w5 & 0xFF);
	fragx_sum = rte_be_to_cpu_16(finfo->w1.frag_size0);
	pkt_hdr_len = frag_size - fragx_sum;

	mbuf = (struct rte_mbuf *)((uintptr_t)wqe - sizeof(struct rte_mbuf));
	*(uint64_t *)(&mbuf->rearm_data) = mbuf_init | b_off;
	mbuf->data_len = frag_size;
	head = mbuf;

	if (inner_rx->lctype == NPC_LT_LC_IP) {
		struct rte_ipv4_hdr *hdr = (struct rte_ipv4_hdr *)
				RTE_PTR_ADD(inner_iova, inner_rx->lcptr);

		l3_hdr_size = (hdr->version_ihl & 0xf) << 2;
	} else {
		struct rte_ipv6_hdr *hdr = (struct rte_ipv6_hdr *)
				RTE_PTR_ADD(inner_iova, inner_rx->lcptr);
		size_t ext_len = sizeof(struct rte_ipv6_hdr);
		uint8_t *nxt_hdr = (uint8_t *)hdr;
		int nh = hdr->proto;

		l3_hdr_size = 0;
		while (nh != -E
error: patch failed: drivers/net/cnxk/cn10k_rx.h:214
error: drivers/net/cnxk/cn10k_rx.h: patch does not apply


      parent reply	other threads:[~2023-06-05 12:39 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20230605121552.473601-1-ndabilpuram@marvell.com>
2023-06-05 12:20 ` checkpatch
2023-06-05 12:25 ` qemudev [this message]

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