From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E185E43AA1 for ; Wed, 7 Feb 2024 18:18:29 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DD6E440295; Wed, 7 Feb 2024 18:18:29 +0100 (CET) Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by mails.dpdk.org (Postfix) with ESMTP id DCED54027D for ; Wed, 7 Feb 2024 18:18:27 +0100 (CET) Received: from loongson.cn (unknown [192.168.100.1]) by gateway (Coremail) with SMTP id _____8CxXOlhu8NleKcLAA--.22337S3; Thu, 08 Feb 2024 01:18:26 +0800 (CST) Received: from localhost.localdomain (unknown [192.168.100.1]) by localhost.localdomain (Coremail) with SMTP id AQAAf8DxDc9hu8NlxgoyAA--.57031S3; Thu, 08 Feb 2024 01:18:25 +0800 (CST) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by localhost.localdomain (8.15.2/8.15.2) with ESMTPS id 417Grgmj920377 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Thu, 8 Feb 2024 00:53:42 +0800 Received: (from root@localhost) by localhost.localdomain (8.15.2/8.15.2/Submit) id 417GreL9920376; Thu, 8 Feb 2024 00:53:40 +0800 Date: Thu, 8 Feb 2024 00:53:40 +0800 From: qemudev@loongson.cn Message-Id: <202402071653.417GreL9920376@localhost.localdomain> Content-Type: text/plain; charset="utf-8" Subject: |WARNING| pw136499-136504 [PATCH v6 1/6] doc: fix fpga 5gnr configuration values In-Reply-To: <20240207171350.242156-2-hernan.vargas@intel.com> References: <20240207171350.242156-2-hernan.vargas@intel.com> To: test-report@dpdk.org Cc: Hernan Vargas , zhoumin@loongson.cn X-CM-TRANSID: AQAAf8DxDc9hu8NlxgoyAA--.57031S3 Authentication-Results: localhost.localdomain; spf=neutral smtp.mail=q emudev@loongson.cn; X-CM-SenderInfo: pthp3vthy6z05rqj20fqof0/1tbiAQAPD2W8p+EAcwBdsw X-Coremail-Antispam: 1Uk129KBj93XoWxArW3Gry5CF1UJrW5tryxWFX_yoW5Aw4xpF WFqa13JFWrXas2k3s3tas8Wa1UWa4UG390gr4kKFsaqF4jvFZYkFW7tFyY9rW3G39rAr43 tr4rXFZ8J3Z5ZFbCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUyCb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVWUJVW8JwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ Jr0_Gr1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4 xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jrv_JF1lYx0Ex4A2jsIE14v2 6r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwAKzVCY07xG64k0F24l42xK82IYc2Ij64vIr4 1l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK 67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1Y6r17MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI 8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE42xK8VAv wI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14 v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07j8PEfUUUUU= X-BeenThere: test-report@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: automatic DPDK test reports List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: test-report-bounces@dpdk.org Test-Label: loongarch-compilation Test-Status: WARNING http://dpdk.org/patch/136499 _apply patch failure_ Submitter: Hernan Vargas Date: Wed, 7 Feb 2024 09:13:45 -0800 DPDK git baseline: Repo:dpdk-next-baseband Branch: for-main CommitID: 263729efd1eb998ba1d7829971ecee620c79d0ce Apply patch set 136499-136504 failed: Checking patch drivers/baseband/fpga_5gnr_fec/fpga_5gnr_fec.h... Checking patch drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c... error: while searching for: * Get HARQ buffer size for each VF/PF: When 0x00, there is no * available DDR space for the corresponding VF/PF. */ reg_32 = fpga_reg_read_32(q->d->mmio_base, FPGA_5GNR_FEC_HARQ_BUF_SIZE_REGS); if (reg_32 < harq_in_length) { left_length = reg_32; rte_bbdev_log(ERR, "HARQ in length > HARQ buffer size\n"); } input = (uint64_t *)rte_pktmbuf_mtod_offset(harq_input, uint8_t *, in_offset); while (left_length > 0) { if (fpga_reg_read_8(q->d->mmio_base, FPGA_5GNR_FEC_DDR4_ADDR_RDY_REGS) == 1) { fpga_reg_write_32(q->d->mmio_base, FPGA_5GNR_FEC_DDR4_WR_ADDR_REGS, out_offset); fpga_reg_write_64(q->d->mmio_base, FPGA_5GNR_FEC_DDR4_WR_DATA_REGS, input[increment]); left_length -= FPGA_5GNR_FEC_DDR_WR_DATA_LEN_IN_BYTES; out_offset += FPGA_5GNR_FEC_DDR_WR_DATA_LEN_IN_BYTES; increment++; fpga_reg_write_8(q->d->mmio_base, FPGA_5GNR_FEC_DDR4_WR_DONE_REGS, 1); } } while (last_transaction > 0) { if (fpga_reg_read_8(q->d->mmio_base, FPGA_5GNR_FEC_DDR4_ADDR_RDY_REGS) == 1) { fpga_reg_write_32(q->d->mmio_base, FPGA_5GNR_FEC_DDR4_WR_ADDR_REGS, out_offset); last_word = input[increment]; last_word &= (uint64_t)(1 << (last_transaction * 4)) - 1; fpga_reg_write_64(q->d->mmio_base, FPGA_5GNR_FEC_DDR4_WR_DATA_REGS, last_word); fpga_reg_write_8(q->d->mmio_base, FPGA_5GNR_FEC_DDR4_WR_DONE_REGS, 1); last_transaction = 0; } } fpga_mutex_free(q); return 1; } static inline int fpga_harq_read_loopback(struct fpga_queue *q, struct rte_mbuf *harq_output, uint16_t harq_in_length, uint32_t harq_in_offset, uint32_t harq_out_offset) { fpga_mutex_acquisition(q); uint32_t left_length, in_offset = harq_in_offset; uint64_t reg; uint32_t increment = 0; uint64_t *input = NULL; uint32_t last_transaction = harq_in_length % FPGA_5GNR_FEC_DDR_WR_DATA_LEN_IN_BYTES; if (last_transaction > 0) harq_in_length += (8 - last_transaction); reg = fpga_reg_read_32(q->d->mmio_base, FPGA_5GNR_FEC_HARQ_BUF_SIZE_REGS); if (reg < harq_in_length) { harq_in_length = reg; rte_bbdev_log(ERR, "HARQ in length > HARQ buffer size\n"); error: patch failed: drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c:1542 error: drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c: patch does not apply Checking patch drivers/baseband/fpga_5gnr_fec/rte_pmd_fpga_5gnr_fec.h...