* [dts-test-report] |SUCCESS| pw(106953) sid(21485) job(DTS_AUTO_471) [V5] test_plans: add test plan for cvl 1pps signal
@ 2022-02-07 9:37 sys_stv
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From: sys_stv @ 2022-02-07 9:37 UTC (permalink / raw)
To: test-report, dts-test-report
[-- Attachment #1: Type: text/plain, Size: 656 bytes --]
Test-Label: Intel-dts-doc-test
Test-Status: SUCCESS
http://dpdk.org/patch/106953
Subject: [V5] test_plans: add test plan for cvl 1pps signal
_Testing OK_
Diff:
test_plans/index.rst
test_plans/cvl_1pps_signal_test_plan.rst
DPDK:
commit 0e4dc6af06228c8504a5538512cb31ed7bf6cc23
Author: Zhihong Wang <wangzhihong.wzh@bytedance.com>
Date: Tue Dec 14 11:30:16 2021 +0800
Comment: ring: fix overflow in memory size calculation
DTS:
commit 48949a535ccdc1586ad95b75e843a9e06553582e
Author: Weiyuan Li <weiyuanx.li@intel.com>
Date: Mon Feb 7 13:34:51 2022 +0800
Comment: tests/TestSuite_generic_flow_api:fix flexbytes case failure.
DPDK STV team
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2022-02-07 9:37 [dts-test-report] |SUCCESS| pw(106953) sid(21485) job(DTS_AUTO_471) [V5] test_plans: add test plan for cvl 1pps signal sys_stv
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