From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0CA0346696 for ; Thu, 1 May 2025 22:29:11 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 88335402CD; Thu, 1 May 2025 22:29:10 +0200 (CEST) Received: from mail-pf1-f179.google.com (mail-pf1-f179.google.com [209.85.210.179]) by mails.dpdk.org (Postfix) with ESMTP id 01CF4402A9 for ; Thu, 1 May 2025 22:29:08 +0200 (CEST) Received: by mail-pf1-f179.google.com with SMTP id d2e1a72fcca58-736c1138ae5so1493354b3a.3 for ; Thu, 01 May 2025 13:29:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20230601.gappssmtp.com; s=20230601; t=1746131348; x=1746736148; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:to:from:date:from:to:cc:subject:date:message-id :reply-to; bh=a/wGbD/Qhs1+HJ92tlSUMSSpzo/7jQPji5HZn7fUZPw=; b=QhJjvmS40kVlhY5Ibt31KKtYuOS40Xhg1FxkVDynDNjQhYzENGaLLhHsOG+URb30I8 zzHSEBpo21ZxE7qozmu1zCipDBViM7FlibVtPdkauYgNEijLDmXlnm1aRwYf2HWo8qYh z9i7NktgjDZhfbYsHeCx+FNdkeTJPrirDiMZi+2aTgwQJv3mD2L/+wxnkoz/Ui4I5Pt/ ATmQoSJ1J0X0D82f9/vRwKga/oIs1NJqyMjPhS3SUri6bbxbF2qErmMKPvJ3YxC0L9g6 JA1YTjLvJQS1a/vZa3bz9/kkrzikLrbynradxAnI2AZgAQaCVaQjOT9E4hUIUYsdq506 BNGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1746131348; x=1746736148; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:to:from:date:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=a/wGbD/Qhs1+HJ92tlSUMSSpzo/7jQPji5HZn7fUZPw=; b=m+0Hn6bM+Fu/PAus7tYdb7LIjN8tlnuMW/oxtHaKXJinIUsQN+3kJlHhdXIxueGHmi Ht1lctz4RrhPZu0INHC8+jHoTRLbScGLMVC1wgJq2KXsMzviLd7LHyWFxs+P6zcMOuax vguI9Uju9ibW3LMaKHGYDgSrcqfi5+FmiXc83I30YFYPxqcovMC5CKSvyJmBxUuX6Q0D qtzQS6cwWFLApbfruahn75i10sw7DJqMkCSSnco3VH2joVlgGvgSmCQnnLzRzh9ccn/i hTmIVcMZ7KjFoRhWzAUmYTPg2WghT3cmivWtflOQ5N56DSGX1c4YCjw5oooj+5oiE2Yc aN9A== X-Gm-Message-State: AOJu0YxiP6v87hK6DDzAg95frXkRz5MbbbKYcp5wUCKvCBQVKmSURHQx yzMGqVnPdMLMXHvlyluCn06md21jgNQf+qyfoecFrnVl1JzvnF9AfQr8IKa81qYoZkHExOxNpg4 q X-Gm-Gg: ASbGncvkAVG41e58i1A4oW5i4GHRbTc7tejqKg/LbY3ZrQ2HgRcvficirwXOyZRwEEG Vx7+XKEgi9pl6Q2LkEutjxr1BaLYdw7TUjspp9Vrb+Ue0z58dE4fRmGF2XiaaoMH2jYy29qYL0g d6a5fWRv49Wz/KJk2NdiW2PMWHLoldsTKVIPuU7NF3WbBnV0lWcctCfsjswuXjBEcjBD6FAC2aV EA9YqZGxDK829edt3RK+sWddImxEBAWMAOaFRXyFnkb7d+Skl2jhmVPgo3AjmD2hZb0bdIzZK/V 1VhNoeAttOnug9W3YLgSmc6l39w/LLD4c0t7MaO8yGAxnMNAYDcfpW8w3/YK8fn+Km4zzoewgwF SMeaR1HSPowtVXiDW X-Google-Smtp-Source: AGHT+IECy7Zk9kKaNDE7ByOK/HxPK1Bk5dp2GMC7oZtusakDfsTLoymbuqQ1SZNYv+wUS51beMNlUQ== X-Received: by 2002:a05:6a21:998c:b0:1f5:9098:e446 with SMTP id adf61e73a8af0-20cde374bb2mr430331637.2.1746131347688; Thu, 01 May 2025 13:29:07 -0700 (PDT) Received: from hermes.local (204-195-96-226.wavecable.com. [204.195.96.226]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-74059020fb9sm83222b3a.114.2025.05.01.13.29.07 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 May 2025 13:29:07 -0700 (PDT) Date: Thu, 1 May 2025 13:29:04 -0700 From: Stephen Hemminger To: users@dpdk.org Subject: Re: Intel E810 and X710 NIC DMA control Message-ID: <20250501132904.0293f560@hermes.local> In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: users@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK usage discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: users-bounces@dpdk.org On Thu, 1 May 2025 19:36:54 +0000 "Lombardo, Ed" wrote: > Hi, > I want control the Intel NICs (E810 and X710) DMA to either the hugepage memory on socket 0 or socket 1. Is there a way to do this in DPDK 24.11? > > I have created two mempools, one on socket 0 and one on socket 1. Now when packets arrive at the NIC receive ports (1 and 2) I only see mbufs in mempool on the CPU socket where the NIC is located being used to . > > Thanks, > Ed The NIC will use the mempool you pass during configuration in rte_eth_rx_queue_setup() You can also get more detailed with rx segment splitting.