From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 5AEAE47CD for ; Fri, 6 May 2016 12:20:02 +0200 (CEST) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP; 06 May 2016 03:20:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,586,1455004800"; d="scan'208";a="98330530" Received: from irsmsx107.ger.corp.intel.com ([163.33.3.99]) by fmsmga004.fm.intel.com with ESMTP; 06 May 2016 03:20:01 -0700 Received: from irsmsx103.ger.corp.intel.com ([169.254.3.54]) by IRSMSX107.ger.corp.intel.com ([169.254.10.133]) with mapi id 14.03.0248.002; Fri, 6 May 2016 11:19:59 +0100 From: "Singh, Jasvinder" To: "Talukdar, Biju" , users Thread-Topic: DPDK IP Pipeline query Thread-Index: AQHRphRxyMyDuRWjSkSEDgDEWfVqG5+rsjJw Date: Fri, 6 May 2016 10:19:59 +0000 Message-ID: <54CBAA185211B4429112C315DA58FF6DE26749@IRSMSX103.ger.corp.intel.com> References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNzEwZjZjODQtNzdkZC00MmI4LTkzZTUtODMwZjZlMzIwOWNmIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IkZJRnFTUnBLdE1lOThub0dsUXloWVhxVXA2b2RwNXdQb0RPdVlzXC9MU2gwPSJ9 x-ctpclassification: CTP_IC x-originating-ip: [163.33.239.180] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-users] DPDK IP Pipeline query X-BeenThere: users@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: usage discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 06 May 2016 10:20:02 -0000 Hi Biju, Please see inline. > -----Original Message----- > From: users [mailto:users-bounces@dpdk.org] On Behalf Of Talukdar, Biju > Sent: Wednesday, May 4, 2016 4:09 PM > To: users > Subject: [dpdk-users] DPDK IP Pipeline query >=20 > Hi, >=20 >=20 > I have one question regarding DPDK IP Pipeline. We are trying to use mult= iple > cores and multiple queues using PASS-THROUGH pipeline. We have one > input port RXQ0 and a output port TXQ0. Now we want to use several cores > to process the incoming traffic. We want to instantiate several pipeline= s and > pin them to different cores. But we are not able to figure out how the > configuration files should look like. Please see the following configurat= ion file > we tried. It gave us error saying more than one writer . >=20 >=20 > Then we thought we could use RX0.1 and TX0.1. We got the error saying > LINK0 RXQs are not contiguous (B). >=20 >=20 > Our goal is to use more cores for the incoming traffic from the same port= . >=20 For distributing the incoming traffic across multiple queues of the nic por= t, you can use RSS feature. We have recently submitted the patch (link belo= w) on the mailing list for consideration in dpdk16.07 release.=20 http://dpdk.org/dev/patchwork/patch/12300/ Please apply the patch and use following configuration to get traffic on di= fferent queues of the nic port. [PIPELINE0] type =3D MASTER core =3D 0 [LINK0] rss_qs =3D 0 1 [PIPELINE1] type =3D PASS-THROUGH core =3D 1 pktq_in =3D RXQ0.0 RXQ0.1 =20 pktq_out =3D SWQ0 SWQ1 [PIPELINE2] type =3D PASS-THROUGH core =3D 2 pktq_in =3D SWQ0 =20 pktq_out =3D TXQ0.0 [PIPELINE3] type =3D PASS-THROUGH core =3D 3 pktq_in =3D SWQ1 =20 pktq_out =3D TXQ1.0 =20 Thanks, Jasvinder > sample configuration file >=20 >=20 > [PIPELINE0] > type =3D MASTER > core =3D 0 >=20 > [PIPELINE1] > type =3D PASS-THROUGH > core =3D 1 > pktq_in =3D RXQ0.0 > pktq_out =3D SWQ0 SWQ1 > dma_size =3D 16 > dma_dst_offset =3D 128; mbuf (128) + 64 > dma_src_offset =3D 278; mbuf (128) + headroom (128) + ethernet header (14= ) > + ttl offset within ip header (8) =3D 278 dma_src_mask =3D > 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF; ipv4 5-tuple dma_hash_offset =3D 144; > dma_dst_offset + dma_size >=20 >=20 > [PIPELINE2] > type =3D PASS-THROUGH > core =3D 2 > pktq_in =3D SWQ0 > pktq_out =3D TXQ0.0 > dma_size =3D 16 > dma_dst_offset =3D 128; mbuf (128) + 64 > dma_src_offset =3D 278; mbuf (128) + headroom (128) + ethernet header (14= ) > + ttl offset within ip header (8) =3D 278 dma_src_mask =3D > 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF; ipv4 5-tuple dma_hash_offset =3D 144; > dma_dst_offset + dma_size >=20 >=20 > [PIPELINE3] > type =3D PASS-THROUGH > core =3D 3 > pktq_in =3D SWQ1 > pktq_out =3D TXQ0.0 > dma_size =3D 16 > dma_dst_offset =3D 128; mbuf (128) + 64 > dma_src_offset =3D 278; mbuf (128) + headroom (128) + ethernet header (14= ) > + ttl offset within ip header (8) =3D 278 dma_src_mask =3D > 00FF0000FFFFFFFFFFFFFFFFFFFFFFFF; ipv4 5-tuple dma_hash_offset =3D 144; > dma_dst_offset + dma_size >=20 >=20 >=20 > Thank you >=20 > Biju