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From: Tom Barbette <barbette@kth.se>
To: 曾懷恩 <the@csie.io>, "Adrien Mazarguil" <adrien.mazarguil@6wind.com>
Cc: "Wenzhuo Lu" <wenzhuo.lu@intel.com>,
	"Konstantin Ananyev" <konstantin.ananyev@intel.com>,
	張敬昊 <frank@csie.io>,
	users@dpdk.org
Subject: Re: [dpdk-users] Flow director struct rte_flow_item_raw guild
Date: Thu, 16 May 2019 08:00:29 +0200	[thread overview]
Message-ID: <751e597b-bfbe-5e4d-d138-f388ffd3eab7@kth.se> (raw)
In-Reply-To: <728B50C7-F3D8-4D9D-B569-66F29EB5D427@csie.io>

Hi,

I learned to look at the datasheet first, or look at the code before 
using "fancy" patterns (specially for Mellanox products that have no 
datasheet :p).
Another way is to just try testpmd "flow create ..." quickly and see how 
it goes.

Eg, for x520, you will have only access to what is called the 2 flex 
bytes, see the 82599 datasheet.

If you grep the code you'll see the constraint are quite huge :

It will fail if any of these is true :
Mask :
	raw_mask->pattern[0] != 0xff ||
             raw_mask->pattern[1] != 0xff)
--> It's a fixed value search on two bytes. And you'll have to set that 
value for all patterns if I remember the datasheet correctly.

Value:
		raw_spec->relative != 0 ||
             raw_spec->search != 0 ||
             raw_spec->reserved != 0 ||
             raw_spec->offset > IXGBE_MAX_FLX_SOURCE_OFF ||
             raw_spec->offset % 2 ||
             raw_spec->limit != 0 ||
             raw_spec->length != 2 ||
             /* pattern can't be 0xffff */
             (raw_spec->pattern[0] == 0xff &&
              raw_spec->pattern[1] == 0xff))

I think XL710 (i40e) will be as restrained. From what I remember the 
flex bytes became a flex payload bytes. So you can't even match on the 
header.


Tom


For relevance, other mask stuff :
    raw_mask->relative != 0x1 ||
             raw_mask->search != 0x1 ||
             raw_mask->reserved != 0x0 ||
             (uint32_t)raw_mask->offset != 0xffffffff ||
             raw_mask->limit != 0xffff ||
             raw_mask->length != 0xffff




Le 16/05/2019 à 07:34, 曾懷恩 a écrit :
> Hi Adrien,
> 
> Thanks for reply,
> 
> I tried to trace the mlx5 and ixgbe driver source code in DPDK source and notice that the flow director APIs are processed in it.
> 
> I also compared the difference of flow director APIs between both two drivers and found that there is no rte_flow_item_raw defined in mlx5 driver.
> 
> Is there any possible mlx5 series NICs support rte_flow_item_raw in the future?
> 
> Thanks a lot.
> 
> Best Regards,
> 
>> Adrien Mazarguil <adrien.mazarguil@6wind.com> 於 2019年5月13日 下午4:49 寫道:
>>
>> On Sat, May 11, 2019 at 02:20:48AM +0800, Huai-En Tseng wrote:
>>> Thanks for reply,
>>>
>>> Actually I’d like to use  rte_flow_item_raw structure with PPP header, the ICMP format is my little trial.
>>
>> OK, makes sense, there's no pattern item for PPP yet.
>>
>>> I will try X520 next week.
>>>
>>> Another question, is ixgbevf also support RTE_FLOW_ITEM_RAW?
>>
>> The ixgbe driver looks like it does but I'm not sure regarding the VF
>> variant, Cc'ing maintainers just in case.
>>
>> -- 
>> Adrien Mazarguil
>> 6WIND
> 


  reply	other threads:[~2019-05-16  6:00 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-09  2:01 曾懷恩
2019-05-09  2:10 ` 張敬昊
2019-05-09  3:51   ` 曾懷恩
2019-05-09 12:38     ` Adrien Mazarguil
2019-05-10  6:38       ` 曾懷恩
2019-05-10 13:44         ` Adrien Mazarguil
2019-05-10 18:20           ` Huai-En Tseng
2019-05-13  8:49             ` Adrien Mazarguil
2019-05-16  5:34               ` 曾懷恩
2019-05-16  6:00                 ` Tom Barbette [this message]
2019-05-22  3:18                   ` 曾懷恩

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