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From: Chinmaya Dwibedy <ckdwibedy@gmail.com>
To: users@dpdk.org
Subject: Re: [dpdk-users] Memory requirements for crypto devices (QAT and AESNI) (using DPDK-17.02)
Date: Mon, 8 May 2017 19:24:24 +0530	[thread overview]
Message-ID: <CAMHS8RGH=D1wtNzhh7rV7-qEXfFnCSxHf1fqRw2NtJEKRvuorQ@mail.gmail.com> (raw)
In-Reply-To: <CAMHS8RFweKQAhsf+LC4Yo3mNKjez9r7g+=Qb6pD9n-torkdvFQ@mail.gmail.com>

Hi,

Can anyone please respond to this email ? Thank you in advance for your
suggestion and time.

Regards,
Chinmaya

On Fri, May 5, 2017 at 6:20 PM, Chinmaya Dwibedy <ckdwibedy@gmail.com>
wrote:

> Hi All,
>
>
> We are using DPK-17.02.  We use crypto via hardware (QAT) and software
> acceleration (AESNI).  There is one to one mapping between crypto Dev and
> worker core. What are the memory requirements for the below stated
>
> 1)           Creation of one physical Crypto device.
>
> 2)           Creation of one AESNI MB virtual Crypto device.
>
> Thereafter we configure a device with the default number of queue pairs to
> set up for the device as shown below.
>
>
> #define CDEV_MP_CACHE_SZ 64
>
> rte_cryptodev_info_get(cdev_id, &info);
>
>                 dev_conf.nb_queue_pairs = info.max_nb_queue_pairs;
>
>                 dev_conf.session_mp.nb_objs = info.sym.max_nb_sessions;
>
>                   dev_conf.socket_id = SOCKET_ID_ANY;
>
>                 dev_conf.session_mp.cache_size = CDEV_MP_CACHE_SZ;
>
> rte_cryptodev_configure (cdev_id, &dev_conf);
>
>
> How to calculate the minimum memory required to configure per HW and per
> SW crypto device. Then we allocate and set up a receive queue pair for a
> device as follows. As of now we use one queue per device and number of
> descriptors per queue pair is set to 2k. If we increase the number of
> descriptors, will it improve the performance in terms of throughput?
>
>
> #define CDEV_MP_NB_OBJS 2048
>
> qp_conf.nb_descriptors = CDEV_MP_NB_OBJS;
>
> rte_cryptodev_queue_pair_setup (cdev_id, 0, &qp_conf, dev_conf.socket_id)
>
>
> We create a session for symmetric cryptographic operations per IPsec
> Security association.  What is the memory required to hold session data
> structure?
>
>
> The intent behind this is to calculate the memory requirements in advance
> (before EAL initialization) and based upon the available memory, figure out
> how many crypto devices (note: our application initializes AESNI vdev
> without using EAL command line option) can be initialized? Say there are 24
> worker cores and we need 24 crypto AESNI vdevs. But there is no sufficient
> hugepage memory for creating 24 crypto AESNI vdevs. In such case, we will
> allocate more hugepages , then call rte_eal_init() and expect it to be
> passed.
>
>
> Thank you in advance for your suggestion and time.
>
>
>
> Regards,
>
> Chinmaya
>
>
>
>
>
>
>
>
>

  reply	other threads:[~2017-05-08 13:54 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-05 12:50 Chinmaya Dwibedy
2017-05-08 13:54 ` Chinmaya Dwibedy [this message]
2017-05-09 15:52   ` Trahe, Fiona
2017-05-10  9:35     ` Chinmaya Dwibedy
2017-05-15 11:52       ` Kusztal, ArkadiuszX
2017-05-16  5:51         ` Chinmaya Dwibedy

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