From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oi0-f46.google.com (mail-oi0-f46.google.com [209.85.218.46]) by dpdk.org (Postfix) with ESMTP id 2CFA64CE4 for ; Mon, 8 May 2017 15:54:25 +0200 (CEST) Received: by mail-oi0-f46.google.com with SMTP id h4so50908988oib.3 for ; Mon, 08 May 2017 06:54:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to; bh=OA0APQqQPGH2W/TyiAwOngt6DhGEw8C8I8Of725//58=; b=sx7dOX2mLhY/baowdzn4W02jXoMXaOhIjiNZetuY9jPOPbN3KmzjpcHtk9Pxkf+btZ PBxVElStnopDE2XUQ7OTgzb6ITMfLD7nxd8BbZKTEvIU6nwg5eTpEx03RtByVyyMvbS+ UVGdGKVIb/sT2+8CRjcRsAlAcLV/hcrmmWvCZ/S9bizKxwYH2KvDhNFKQR+PAiv2MoFn v70+ceIK+R/l8gtZQe+0yQYrxkSSUNmioblpCuHPq6X5FxF0i21MeiYiupcSv1STLbSy FieUy0FMwdegr+7okOJHQPFW3Ml+97zETmVeHXhfXzgX9vKw/ADejb7LailYQKvbs0VE 5XpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to; bh=OA0APQqQPGH2W/TyiAwOngt6DhGEw8C8I8Of725//58=; b=VN6m6np61TpN5DuIQoe9KwXeUQ6JkOsb1IPMc8sgAW1kYFwxDDEmhkUREVrgAIqcjo h4PHQjQcSdAIihltHIgaXDpdY28lOMcGATX8zKOyPM+JJemzF/lNAtdb/N2bpE+WidJG khRHX9U24qgmAMqxzPgqzkOuAXFm03/0TdoMKYCSXDHLeD+eBwouPvUE0IE3+pPWoijN zLuAiLC9WWEATdp1xFbizstlZX6TJpz4dkYwxI8c2a8P8Yi2HEE4XeDTCGsepHCfknhe qYp2Rw9H+drjg4/SejEfy2Y4uHZJKu47O2f5jWo3GXXJzUslQduFCKi5BANG/BXulTgI Im9A== X-Gm-Message-State: AN3rC/5kV8OACN6BWby8OL2x48O/v9/S5WGks/MfaMj1FkgWQ2wFD62Y xV1Befme64s5lM+Bgw31Zffrl7wLweQs X-Received: by 10.157.45.36 with SMTP id v33mr26397927ota.68.1494251664419; Mon, 08 May 2017 06:54:24 -0700 (PDT) MIME-Version: 1.0 Received: by 10.157.63.215 with HTTP; Mon, 8 May 2017 06:54:24 -0700 (PDT) In-Reply-To: References: From: Chinmaya Dwibedy Date: Mon, 8 May 2017 19:24:24 +0530 Message-ID: To: users@dpdk.org Content-Type: text/plain; charset=UTF-8 X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: Re: [dpdk-users] Memory requirements for crypto devices (QAT and AESNI) (using DPDK-17.02) X-BeenThere: users@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK usage discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 May 2017 13:54:25 -0000 Hi, Can anyone please respond to this email ? Thank you in advance for your suggestion and time. Regards, Chinmaya On Fri, May 5, 2017 at 6:20 PM, Chinmaya Dwibedy wrote: > Hi All, > > > We are using DPK-17.02. We use crypto via hardware (QAT) and software > acceleration (AESNI). There is one to one mapping between crypto Dev and > worker core. What are the memory requirements for the below stated > > 1) Creation of one physical Crypto device. > > 2) Creation of one AESNI MB virtual Crypto device. > > Thereafter we configure a device with the default number of queue pairs to > set up for the device as shown below. > > > #define CDEV_MP_CACHE_SZ 64 > > rte_cryptodev_info_get(cdev_id, &info); > > dev_conf.nb_queue_pairs = info.max_nb_queue_pairs; > > dev_conf.session_mp.nb_objs = info.sym.max_nb_sessions; > > dev_conf.socket_id = SOCKET_ID_ANY; > > dev_conf.session_mp.cache_size = CDEV_MP_CACHE_SZ; > > rte_cryptodev_configure (cdev_id, &dev_conf); > > > How to calculate the minimum memory required to configure per HW and per > SW crypto device. Then we allocate and set up a receive queue pair for a > device as follows. As of now we use one queue per device and number of > descriptors per queue pair is set to 2k. If we increase the number of > descriptors, will it improve the performance in terms of throughput? > > > #define CDEV_MP_NB_OBJS 2048 > > qp_conf.nb_descriptors = CDEV_MP_NB_OBJS; > > rte_cryptodev_queue_pair_setup (cdev_id, 0, &qp_conf, dev_conf.socket_id) > > > We create a session for symmetric cryptographic operations per IPsec > Security association. What is the memory required to hold session data > structure? > > > The intent behind this is to calculate the memory requirements in advance > (before EAL initialization) and based upon the available memory, figure out > how many crypto devices (note: our application initializes AESNI vdev > without using EAL command line option) can be initialized? Say there are 24 > worker cores and we need 24 crypto AESNI vdevs. But there is no sufficient > hugepage memory for creating 24 crypto AESNI vdevs. In such case, we will > allocate more hugepages , then call rte_eal_init() and expect it to be > passed. > > > Thank you in advance for your suggestion and time. > > > > Regards, > > Chinmaya > > > > > > > > >