From: Thomas Monjalon <thomas@monjalon.net>
To: jerinj@marvell.com
Cc: web@dpdk.org, maen@marvell.com
Subject: Re: [dpdk-web] [PATCH] update Marvell supported NICs
Date: Thu, 05 Dec 2019 16:07:07 +0100 [thread overview]
Message-ID: <7003307.MebMP3tPVl@xps> (raw)
In-Reply-To: <20191113160934.87424-1-jerinj@marvell.com>
13/11/2019 17:09, jerinj@marvell.com:
> +- [octeontx2] (https://doc.dpdk.org/guides/nics/octeontx2.html) (Marvell OCTEON TX2 family SoCs)
> - [mvpp2](http://doc.dpdk.org/guides/nics/mvpp2.html) (Marvell Packet Processor v2)
> - [mvneta](http://doc.dpdk.org/guides/nics/mvneta.html) (Marvell NETA)
> +- [thunderx](http://doc.dpdk.org/guides/nics/thunderx.html) (CN88XX)
> +- [octeontx](http://doc.dpdk.org/guides/nics/octeontx.html) (CN83XX, CN82XX, CN81XX, CN80XX)
> +- [liquidio](http://doc.dpdk.org/guides/nics/liquidio.html) (LiquidIO II CN23XX)
> +- [bnx2x](http://doc.dpdk.org/guides/nics/bnx2x.html) (QLogic 578xx)
> +- [qede](http://doc.dpdk.org/guides/nics/qede.html) (QLogic FastLinQ QL4xxxx)
Usually we sort the list in a chronological or logical order.
Shouldn't we move octeontx2 after octeontx?
Any other reordering?
prev parent reply other threads:[~2019-12-05 15:07 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-13 16:09 jerinj
2019-12-05 15:07 ` Thomas Monjalon [this message]
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