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From: Chenbo Xia <chenbo.xia@intel.com>
To: dev@dpdk.org
Cc: Ray Kinsella <mdr@ashroe.eu>
Subject: [dpdk-dev] [PATCH 1/8] bus/pci: add new memory resource access APIs
Date: Fri, 10 Sep 2021 10:23:55 +0800	[thread overview]
Message-ID: <20210910022402.26620-2-chenbo.xia@intel.com> (raw)
In-Reply-To: <20210910022402.26620-1-chenbo.xia@intel.com>

Some applications wants to access PCI memory resource. Currently
applications use struct rte_pci_device to access it. Since the
structure will be made internal later, this patch adds two APIs
for memory resource access.

Signed-off-by: Chenbo Xia <chenbo.xia@intel.com>
---
 doc/guides/rel_notes/release_21_11.rst |  5 ++
 drivers/bus/pci/pci_common.c           | 78 ++++++++++++++++++++++++++
 drivers/bus/pci/rte_bus_pci.h          | 36 ++++++++++++
 drivers/bus/pci/version.map            |  4 ++
 4 files changed, 123 insertions(+)

diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst
index 675b573834..1c9abb74ec 100644
--- a/doc/guides/rel_notes/release_21_11.rst
+++ b/doc/guides/rel_notes/release_21_11.rst
@@ -62,6 +62,11 @@ New Features
   * Added bus-level parsing of the devargs syntax.
   * Kept compatibility with the legacy syntax as parsing fallback.
 
+* **Added new memory resource read/write APIs in PCI bus.**
+
+  Added new memory resource read/write APIs ``rte_pci_mem_rd32`` and
+  ``rte_pci_mem_wr32`` for applications to read/write PCI memory
+  resource.
 
 Removed Items
 -------------
diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c
index 3406e03b29..944288b132 100644
--- a/drivers/bus/pci/pci_common.c
+++ b/drivers/bus/pci/pci_common.c
@@ -25,6 +25,7 @@
 #include <rte_common.h>
 #include <rte_devargs.h>
 #include <rte_vfio.h>
+#include <rte_io.h>
 
 #include "private.h"
 
@@ -777,6 +778,83 @@ rte_pci_set_bus_master(struct rte_pci_device *dev, bool enable)
 	return 0;
 }
 
+static void *
+get_pci_mem_addr(const char *name, uint16_t idx, uint64_t offset)
+{
+	struct rte_pci_device *dev = NULL;
+	struct rte_pci_addr addr = {0};
+	struct rte_mem_resource *res = NULL;
+	bool found = false;
+
+	if (rte_pci_addr_parse(name, &addr)) {
+		RTE_LOG(ERR, EAL, "Wrong name format of PCI device (%s)", name);
+		return NULL;
+	}
+
+	FOREACH_DEVICE_ON_PCIBUS(dev) {
+		if (rte_pci_addr_cmp(&dev->addr, &addr)) {
+			continue;
+		} else {
+			found = true;
+			break;
+		}
+	}
+
+	if (!found) {
+		RTE_LOG(ERR, EAL, "Can not find the device (%s)", name);
+		return NULL;
+	}
+
+	res = &dev->mem_resource[idx];
+	if (idx >= PCI_MAX_RESOURCE || res->len == 0 || res->addr == NULL) {
+		RTE_LOG(ERR, EAL, "Invalid index of a mapped memory resourse");
+		return NULL;
+	}
+
+	if (offset >= res->len || offset + 4 > res->len) {
+		RTE_LOG(ERR, EAL, "Invalid offset of a memory resourse");
+		return NULL;
+	}
+
+	return (void *)((char *)res->addr + offset);
+}
+
+int
+rte_pci_mem_rd32(const char *name, uint16_t idx, uint32_t *data, uint64_t offset)
+{
+	void *reg_addr = NULL;
+
+	if (data == NULL) {
+		RTE_LOG(ERR, EAL, "NULL data buffer for PCI memory access");
+		return -EINVAL;
+	}
+
+	reg_addr = get_pci_mem_addr(name, idx, offset);
+	if (reg_addr == NULL)
+		return -EINVAL;
+
+	*data = rte_read32(reg_addr);
+	return 0;
+}
+
+int
+rte_pci_mem_wr32(const char *name, uint16_t idx, const uint32_t *data, uint64_t offset)
+{
+	void *reg_addr = NULL;
+
+	if (data == NULL) {
+		RTE_LOG(ERR, EAL, "NULL data buffer for PCI memory access");
+		return -EINVAL;
+	}
+
+	reg_addr = get_pci_mem_addr(name, idx, offset);
+	if (reg_addr == NULL)
+		return -EINVAL;
+
+	rte_write32(*data, reg_addr);
+	return 0;
+}
+
 struct rte_pci_bus rte_pci_bus = {
 	.bus = {
 		.scan = rte_pci_scan,
diff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h
index 583470e831..21d9dd4289 100644
--- a/drivers/bus/pci/rte_bus_pci.h
+++ b/drivers/bus/pci/rte_bus_pci.h
@@ -392,6 +392,42 @@ void rte_pci_ioport_read(struct rte_pci_ioport *p,
 void rte_pci_ioport_write(struct rte_pci_ioport *p,
 		const void *data, size_t len, off_t offset);
 
+/**
+ * Read 4 bytes from PCI memory resource.
+ *
+ * @param name
+ *   PCI device name (e.g., 0000:18:00.0).
+ * @param idx
+ *   Memory resource index.
+ * @param data
+ *   Data buffer where the bytes should be read into.
+ * @param offset
+ *   The offset into the PCI memory resource.
+ * @return
+ *  0 on success, negative value on error.
+ */
+__rte_experimental
+int
+rte_pci_mem_rd32(const char *name, uint16_t idx, uint32_t *data, uint64_t offset);
+
+/**
+ * Write 4 bytes to PCI memory resource.
+ *
+ * @param name
+ *   PCI device name (e.g., 0000:18:00.0).
+ * @param idx
+ *   Memory resource index.
+ * @param data
+ *   Buffer of data that should be written to PCI memory.
+ * @param offset
+ *   The offset into the PCI memory resource.
+ * @return
+ *  0 on success, negative value on error.
+ */
+__rte_experimental
+int
+rte_pci_mem_wr32(const char *name, uint16_t idx, const uint32_t *data, uint64_t offset);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/drivers/bus/pci/version.map b/drivers/bus/pci/version.map
index aa56439c2b..01ec836559 100644
--- a/drivers/bus/pci/version.map
+++ b/drivers/bus/pci/version.map
@@ -24,4 +24,8 @@ EXPERIMENTAL {
 
 	# added in 21.08
 	rte_pci_set_bus_master;
+
+	# added in 21.11
+	rte_pci_mem_rd32;
+	rte_pci_mem_wr32;
 };
-- 
2.17.1


  reply	other threads:[~2021-09-10  2:37 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-10  2:23 [dpdk-dev] [PATCH 0/8] Removal of PCI bus ABIs Chenbo Xia
2021-09-10  2:23 ` Chenbo Xia [this message]
2021-09-13 11:59   ` [dpdk-dev] [PATCH 1/8] bus/pci: add new memory resource access APIs Kinsella, Ray
2021-09-10  2:23 ` [dpdk-dev] [PATCH 2/8] app/testpmd: use PCI " Chenbo Xia
2021-09-16  6:10   ` Li, Xiaoyun
2021-09-16  6:38     ` Xia, Chenbo
2021-09-10  2:23 ` [dpdk-dev] [PATCH 3/8] examples/ethtool: use PCI library API to get PCI address Chenbo Xia
2021-09-10  2:23 ` [dpdk-dev] [PATCH 4/8] examples/kni: remove unused PCI bus header Chenbo Xia
2021-09-17 15:38   ` Ferruh Yigit
2021-09-10  2:23 ` [dpdk-dev] [PATCH 5/8] test/kni: remove setting of PCI ID and address Chenbo Xia
2021-09-10  7:12   ` David Marchand
2021-09-17 15:38   ` Ferruh Yigit
2021-09-10  2:24 ` [dpdk-dev] [PATCH 6/8] examples/ip_pipeline: " Chenbo Xia
2021-09-10  7:18   ` David Marchand
2021-09-10  8:21     ` Xia, Chenbo
2021-09-17  3:09     ` Xia, Chenbo
2021-09-17 11:55       ` David Marchand
2021-09-17 15:37         ` Ferruh Yigit
2021-09-10  2:24 ` [dpdk-dev] [PATCH 7/8] kni: replace unused variable definition with reserved bytes Chenbo Xia
2021-09-10  2:24 ` [dpdk-dev] [PATCH 8/8] bus/pci: remove ABIs in PCI bus Chenbo Xia
2021-09-13 12:06   ` Kinsella, Ray
2021-09-14  8:15   ` Xu, Rosen
2021-09-18  2:24 ` [dpdk-dev] [PATCH v2 0/7] Removal of PCI bus ABIs Chenbo Xia
2021-09-18  2:24   ` [dpdk-dev] [PATCH v2 1/7] bus/pci: add new memory resource access APIs Chenbo Xia
2021-09-18  2:24   ` [dpdk-dev] [PATCH v2 2/7] app/testpmd: use PCI " Chenbo Xia
2021-09-18  2:44     ` Li, Xiaoyun
2021-09-18  2:24   ` [dpdk-dev] [PATCH v2 3/7] examples/ethtool: use PCI library API to get PCI address Chenbo Xia
2021-09-18  2:24   ` [dpdk-dev] [PATCH v2 4/7] examples/kni: remove unused PCI bus header Chenbo Xia
2021-09-18  2:24   ` [dpdk-dev] [PATCH v2 5/7] kni: remove unused PCI info from test and example Chenbo Xia
2021-09-18  2:24   ` [dpdk-dev] [PATCH v2 6/7] kni: replace unused variable definition with reserved bytes Chenbo Xia
2021-09-18  2:24   ` [dpdk-dev] [PATCH v2 7/7] bus/pci: remove ABIs in PCI bus Chenbo Xia
2021-09-29  7:38   ` [dpdk-dev] [PATCH v2 0/7] Removal of PCI bus ABIs Xia, Chenbo
2021-09-30  8:45     ` David Marchand
2021-10-04 13:37       ` David Marchand
2021-10-04 15:56         ` Harris, James R
2021-10-06  4:25           ` Xia, Chenbo
2021-10-08  6:15             ` Liu, Changpeng
2021-10-08  7:08               ` David Marchand
2021-10-08  7:44                 ` Liu, Changpeng
2021-10-11  6:58                   ` Xia, Chenbo
2021-10-11 12:55                     ` Thomas Monjalon
2021-10-12  0:35                       ` Harris, James R
2021-10-12  7:04                         ` Thomas Monjalon
2021-10-12 16:59                           ` Walker, Benjamin
2021-10-12 18:43                             ` Thomas Monjalon
2021-10-12 19:26                               ` Walker, Benjamin
2021-10-12 21:50                                 ` Thomas Monjalon
2021-10-13 17:56                                   ` Walker, Benjamin
2021-10-13 18:59                                     ` Thomas Monjalon
2021-10-13 22:48                                       ` Walker, Benjamin
2021-10-14  6:41                                         ` Thomas Monjalon
2022-07-11 12:11                                           ` Thomas Monjalon
2021-10-14  2:21                                       ` Xia, Chenbo
2021-10-14  6:41                                         ` Thomas Monjalon
2021-10-14  7:00                                           ` Xia, Chenbo
2021-10-14  7:07                                             ` Thomas Monjalon
2021-10-14  8:07                                               ` Xia, Chenbo
2021-10-14  8:25                                                 ` Thomas Monjalon
2021-10-27 12:03                                                   ` Xia, Chenbo

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