* [dpdk-dev] [PATCH 20.11 0/7] backport feature support to DPDK 20.11
@ 2021-09-10 8:08 Wenjun Wu
2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 1/7] net/ice: add priority check for flow filters Wenjun Wu
` (6 more replies)
0 siblings, 7 replies; 8+ messages in thread
From: Wenjun Wu @ 2021-09-10 8:08 UTC (permalink / raw)
To: dev, qi.z.zhang; +Cc: Wenjun Wu
Below patches are target to DPDK 20.11.
They are based on the previous patch set in
http://patches.dpdk.org/project/dpdk/list/?series=18158&state=%2A&archive=both.
They are not for LTS upstream, just for users to cherrypick.
feature includes
1. flow priority for switch.
2. support maximum to 256 queues in PF.
3. support L4 QinQ filter.
4. support 6 tuple.
Steve Yang (1):
net/ice/base: support L4 for QinQ switch filter
Wenjun Wu (4):
net/ice: support 256 queues
net/ice: fix error set of queue number
net/ice: support 6-tuple RSS
net/ice: add L4 support for QinQ switch filter
Yuying Zhang (2):
net/ice: add priority check for flow filters
net/ice: refine flow priority usage
drivers/net/ice/base/ice_switch.c | 176 +++++++++++++++++++++++++++-
drivers/net/ice/ice_acl_filter.c | 5 +-
drivers/net/ice/ice_ethdev.c | 8 +-
drivers/net/ice/ice_ethdev.h | 4 +-
drivers/net/ice/ice_fdir_filter.c | 5 +-
drivers/net/ice/ice_generic_flow.c | 4 +-
drivers/net/ice/ice_hash.c | 20 +++-
drivers/net/ice/ice_switch_filter.c | 35 +++++-
8 files changed, 238 insertions(+), 19 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 8+ messages in thread* [dpdk-dev] [PATCH 20.11 1/7] net/ice: add priority check for flow filters 2021-09-10 8:08 [dpdk-dev] [PATCH 20.11 0/7] backport feature support to DPDK 20.11 Wenjun Wu @ 2021-09-10 8:08 ` Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 2/7] net/ice: refine flow priority usage Wenjun Wu ` (5 subsequent siblings) 6 siblings, 0 replies; 8+ messages in thread From: Wenjun Wu @ 2021-09-10 8:08 UTC (permalink / raw) To: dev, qi.z.zhang; +Cc: Yuying Zhang From: Yuying Zhang <yuying.zhang@intel.com> This patch is not for LTS upstream, just for users to cherry-pick. Priority 0 and 1 were supported in switch filter. However, FDIR, ACL and RSS don't support priority 1. Add priority check in FDIR, ACL and RSS filter parse functions. Signed-off-by: Yuying Zhang <yuying.zhang@intel.com> --- drivers/net/ice/ice_acl_filter.c | 5 ++++- drivers/net/ice/ice_fdir_filter.c | 5 ++++- drivers/net/ice/ice_hash.c | 5 ++++- 3 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/net/ice/ice_acl_filter.c b/drivers/net/ice/ice_acl_filter.c index 14e36aa9f6..201c9fb382 100644 --- a/drivers/net/ice/ice_acl_filter.c +++ b/drivers/net/ice/ice_acl_filter.c @@ -904,7 +904,7 @@ ice_acl_parse(struct ice_adapter *ad, uint32_t array_len, const struct rte_flow_item pattern[], const struct rte_flow_action actions[], - uint32_t priority __rte_unused, + uint32_t priority, void **meta, struct rte_flow_error *error) { @@ -914,6 +914,9 @@ ice_acl_parse(struct ice_adapter *ad, uint64_t input_set; int ret; + if (priority >= 1) + return -rte_errno; + memset(filter, 0, sizeof(*filter)); item = ice_search_pattern_match_item(pattern, array, array_len, error); if (!item) diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c index be04fcb8f3..1a9280a2eb 100644 --- a/drivers/net/ice/ice_fdir_filter.c +++ b/drivers/net/ice/ice_fdir_filter.c @@ -2029,7 +2029,7 @@ ice_fdir_parse(struct ice_adapter *ad, uint32_t array_len, const struct rte_flow_item pattern[], const struct rte_flow_action actions[], - uint32_t priority __rte_unused, + uint32_t priority, void **meta, struct rte_flow_error *error) { @@ -2039,6 +2039,9 @@ ice_fdir_parse(struct ice_adapter *ad, uint64_t input_set; int ret; + if (priority >= 1) + return -rte_errno; + memset(filter, 0, sizeof(*filter)); item = ice_search_pattern_match_item(pattern, array, array_len, error); if (!item) diff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c index ae095eb3cf..b8a87ea1dd 100644 --- a/drivers/net/ice/ice_hash.c +++ b/drivers/net/ice/ice_hash.c @@ -1238,7 +1238,7 @@ ice_hash_parse_pattern_action(__rte_unused struct ice_adapter *ad, uint32_t array_len, const struct rte_flow_item pattern[], const struct rte_flow_action actions[], - uint32_t priority __rte_unused, + uint32_t priority, void **meta, struct rte_flow_error *error) { @@ -1246,6 +1246,9 @@ ice_hash_parse_pattern_action(__rte_unused struct ice_adapter *ad, struct ice_pattern_match_item *pattern_match_item; struct rss_meta *rss_meta_ptr; + if (priority >= 1) + return -rte_errno; + rss_meta_ptr = rte_zmalloc(NULL, sizeof(*rss_meta_ptr), 0); if (!rss_meta_ptr) { rte_flow_error_set(error, EINVAL, -- 2.25.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH 20.11 2/7] net/ice: refine flow priority usage 2021-09-10 8:08 [dpdk-dev] [PATCH 20.11 0/7] backport feature support to DPDK 20.11 Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 1/7] net/ice: add priority check for flow filters Wenjun Wu @ 2021-09-10 8:08 ` Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 3/7] net/ice: support 256 queues Wenjun Wu ` (4 subsequent siblings) 6 siblings, 0 replies; 8+ messages in thread From: Wenjun Wu @ 2021-09-10 8:08 UTC (permalink / raw) To: dev, qi.z.zhang; +Cc: Yuying Zhang From: Yuying Zhang <yuying.zhang@intel.com> This patch is not for LTS upstream, just for users to cherry-pick. Current code uses switch filter as backup of FDIR in non-pipeline mode and Value 1 denotes higher priority. This patch refines priority usage to match the original design of rte_flow attribute. When priority is 0, rules are create in switch filter first and FDIR is used as backup. When priority is 1, only switch filter is supported and has lower priority. Signed-off-by: Yuying Zhang <yuying.zhang@intel.com> --- drivers/net/ice/ice_generic_flow.c | 4 ++-- drivers/net/ice/ice_switch_filter.c | 7 +++++-- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/ice_generic_flow.c b/drivers/net/ice/ice_generic_flow.c index ec141e8fa0..e195161a18 100644 --- a/drivers/net/ice/ice_generic_flow.c +++ b/drivers/net/ice/ice_generic_flow.c @@ -1927,9 +1927,9 @@ ice_register_parser(struct ice_flow_parser *parser, } else { if (parser->engine->type == ICE_FLOW_ENGINE_SWITCH || parser->engine->type == ICE_FLOW_ENGINE_HASH) - TAILQ_INSERT_TAIL(list, parser_node, node); - else if (parser->engine->type == ICE_FLOW_ENGINE_FDIR) TAILQ_INSERT_HEAD(list, parser_node, node); + else if (parser->engine->type == ICE_FLOW_ENGINE_FDIR) + TAILQ_INSERT_TAIL(list, parser_node, node); else if (parser->engine->type == ICE_FLOW_ENGINE_ACL) TAILQ_INSERT_HEAD(list, parser_node, node); else diff --git a/drivers/net/ice/ice_switch_filter.c b/drivers/net/ice/ice_switch_filter.c index db1586c970..45fa9723d2 100644 --- a/drivers/net/ice/ice_switch_filter.c +++ b/drivers/net/ice/ice_switch_filter.c @@ -1560,7 +1560,7 @@ ice_switch_parse_dcf_action(struct ice_dcf_adapter *ad, rule_info->sw_act.src = rule_info->sw_act.vsi_handle; rule_info->sw_act.flag = ICE_FLTR_RX; rule_info->rx = 1; - rule_info->priority = priority + 5; + rule_info->priority = 6 - priority; return 0; } @@ -1639,7 +1639,7 @@ ice_switch_parse_action(struct ice_pf *pf, rule_info->sw_act.vsi_handle = vsi->idx; rule_info->rx = 1; rule_info->sw_act.src = vsi->idx; - rule_info->priority = priority + 5; + rule_info->priority = 6 - priority; return 0; @@ -1749,6 +1749,9 @@ ice_switch_parse_pattern_action(struct ice_adapter *ad, ICE_NON_TUN; struct ice_pattern_match_item *pattern_match_item = NULL; + if (priority != 0 && priority != 1) + return rte_errno; + for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { item_num++; if (item->type == RTE_FLOW_ITEM_TYPE_ETH) { -- 2.25.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH 20.11 3/7] net/ice: support 256 queues 2021-09-10 8:08 [dpdk-dev] [PATCH 20.11 0/7] backport feature support to DPDK 20.11 Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 1/7] net/ice: add priority check for flow filters Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 2/7] net/ice: refine flow priority usage Wenjun Wu @ 2021-09-10 8:08 ` Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 4/7] net/ice: fix error set of queue number Wenjun Wu ` (3 subsequent siblings) 6 siblings, 0 replies; 8+ messages in thread From: Wenjun Wu @ 2021-09-10 8:08 UTC (permalink / raw) To: dev, qi.z.zhang; +Cc: Wenjun Wu, Dapeng Yu This patch is not for LTS upstream, just for users to cherry-pick. 256 queues can be allowed now. Improve the code to support 256 queues for per PF. Signed-off-by: Dapeng Yu <dapengx.yu@intel.com> Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com> --- drivers/net/ice/ice_ethdev.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h index f96625f43a..94b99999b3 100644 --- a/drivers/net/ice/ice_ethdev.h +++ b/drivers/net/ice/ice_ethdev.h @@ -21,8 +21,8 @@ #define ICE_ADMINQ_BUF_SZ 4096 #define ICE_SBIOQ_BUF_SZ 4096 #define ICE_MAILBOXQ_BUF_SZ 4096 -/* Number of queues per TC should be one of 1, 2, 4, 8, 16, 32, 64 */ -#define ICE_MAX_Q_PER_TC 64 +/* Number of queues per TC should be one of 1, 2, 4, 8, 16, 32, 64, 128, 256 */ +#define ICE_MAX_Q_PER_TC 256 #define ICE_NUM_DESC_DEFAULT 512 #define ICE_BUF_SIZE_MIN 1024 #define ICE_FRAME_SIZE_MAX 9728 -- 2.25.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH 20.11 4/7] net/ice: fix error set of queue number 2021-09-10 8:08 [dpdk-dev] [PATCH 20.11 0/7] backport feature support to DPDK 20.11 Wenjun Wu ` (2 preceding siblings ...) 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 3/7] net/ice: support 256 queues Wenjun Wu @ 2021-09-10 8:08 ` Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 5/7] net/ice: support 6-tuple RSS Wenjun Wu ` (2 subsequent siblings) 6 siblings, 0 replies; 8+ messages in thread From: Wenjun Wu @ 2021-09-10 8:08 UTC (permalink / raw) To: dev, qi.z.zhang; +Cc: Wenjun Wu This patch is not for LTS upstream, just for users to cherry-pick. The queue number actually applied should be the maximum integer power of 2 less than or equal to min(vsi->nb_qps, ICE_MAX_Q_PER_TC), so we need to get the most significant 1 bit. However the return value of function rte_bsf32 is the least significant 1 bit. This patch replaces the function rte_bsf32 with the function rte_fls_u32 and adds necessary boundary check. Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com> --- drivers/net/ice/ice_ethdev.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 5a1e775718..ce98477427 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -750,7 +750,7 @@ ice_vsi_config_tc_queue_mapping(struct ice_vsi *vsi, struct ice_aqc_vsi_props *info, uint8_t enabled_tcmap) { - uint16_t bsf, qp_idx; + uint16_t fls, qp_idx; /* default tc 0 now. Multi-TC supporting need to be done later. * Configure TC and queue mapping parameters, for enabled TC, @@ -762,15 +762,15 @@ ice_vsi_config_tc_queue_mapping(struct ice_vsi *vsi, } vsi->nb_qps = RTE_MIN(vsi->nb_qps, ICE_MAX_Q_PER_TC); - bsf = rte_bsf32(vsi->nb_qps); + fls = (vsi->nb_qps == 0) ? 0 : rte_fls_u32(vsi->nb_qps) - 1; /* Adjust the queue number to actual queues that can be applied */ - vsi->nb_qps = 0x1 << bsf; + vsi->nb_qps = (vsi->nb_qps == 0) ? 0 : 0x1 << fls; qp_idx = 0; /* Set tc and queue mapping with VSI */ info->tc_mapping[0] = rte_cpu_to_le_16((qp_idx << ICE_AQ_VSI_TC_Q_OFFSET_S) | - (bsf << ICE_AQ_VSI_TC_Q_NUM_S)); + (fls << ICE_AQ_VSI_TC_Q_NUM_S)); /* Associate queue number with VSI */ info->mapping_flags |= rte_cpu_to_le_16(ICE_AQ_VSI_Q_MAP_CONTIG); -- 2.25.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH 20.11 5/7] net/ice: support 6-tuple RSS 2021-09-10 8:08 [dpdk-dev] [PATCH 20.11 0/7] backport feature support to DPDK 20.11 Wenjun Wu ` (3 preceding siblings ...) 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 4/7] net/ice: fix error set of queue number Wenjun Wu @ 2021-09-10 8:08 ` Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 6/7] net/ice: add L4 support for QinQ switch filter Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 7/7] net/ice/base: support L4 " Wenjun Wu 6 siblings, 0 replies; 8+ messages in thread From: Wenjun Wu @ 2021-09-10 8:08 UTC (permalink / raw) To: dev, qi.z.zhang; +Cc: Wenjun Wu This patch is not for LTS upstream, just for users to cherry-pick. Add 6-tuple RSS support for pattern eth/vlan/ipv4, eth/vlan/ipv4/sctp, eth/vlan/ipv4/udp,eth/vlan/ipv4/tcp. Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com> --- drivers/net/ice/ice_hash.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c index b8a87ea1dd..89bc458b86 100644 --- a/drivers/net/ice/ice_hash.c +++ b/drivers/net/ice/ice_hash.c @@ -505,6 +505,9 @@ struct ice_hash_match_type ice_hash_type_list[] = { {ETH_RSS_IPV4 | ETH_RSS_L3_DST_ONLY, BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA)}, {ETH_RSS_IPV4, ICE_FLOW_HASH_IPV4}, + {ETH_RSS_C_VLAN | ETH_RSS_IPV4, + BIT_ULL(ICE_FLOW_FIELD_IDX_C_VLAN) | + ICE_FLOW_HASH_IPV4}, {ETH_RSS_FRAG_IPV4, ICE_FLOW_HASH_IPV4 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_ID)}, @@ -539,6 +542,10 @@ struct ice_hash_match_type ice_hash_type_list[] = { {ETH_RSS_NONFRAG_IPV4_UDP, ICE_HASH_UDP_IPV4 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)}, + {ETH_RSS_C_VLAN | ETH_RSS_NONFRAG_IPV4_UDP, + BIT_ULL(ICE_FLOW_FIELD_IDX_C_VLAN) | + ICE_HASH_UDP_IPV4 | + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)}, {ETH_RSS_NONFRAG_IPV4_TCP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT) | @@ -570,6 +577,10 @@ struct ice_hash_match_type ice_hash_type_list[] = { {ETH_RSS_NONFRAG_IPV4_TCP, ICE_HASH_TCP_IPV4 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)}, + {ETH_RSS_C_VLAN | ETH_RSS_NONFRAG_IPV4_TCP, + BIT_ULL(ICE_FLOW_FIELD_IDX_C_VLAN) | + ICE_HASH_TCP_IPV4 | + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)}, {ETH_RSS_NONFRAG_IPV4_SCTP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT) | @@ -601,6 +612,10 @@ struct ice_hash_match_type ice_hash_type_list[] = { {ETH_RSS_NONFRAG_IPV4_SCTP, ICE_HASH_SCTP_IPV4 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)}, + {ETH_RSS_C_VLAN | ETH_RSS_NONFRAG_IPV4_SCTP, + BIT_ULL(ICE_FLOW_FIELD_IDX_C_VLAN) | + ICE_HASH_SCTP_IPV4 | + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)}, /* IPV6 */ {ETH_RSS_IPV6 | ETH_RSS_L3_SRC_ONLY, BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA)}, -- 2.25.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH 20.11 6/7] net/ice: add L4 support for QinQ switch filter 2021-09-10 8:08 [dpdk-dev] [PATCH 20.11 0/7] backport feature support to DPDK 20.11 Wenjun Wu ` (4 preceding siblings ...) 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 5/7] net/ice: support 6-tuple RSS Wenjun Wu @ 2021-09-10 8:08 ` Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 7/7] net/ice/base: support L4 " Wenjun Wu 6 siblings, 0 replies; 8+ messages in thread From: Wenjun Wu @ 2021-09-10 8:08 UTC (permalink / raw) To: dev, qi.z.zhang; +Cc: Wenjun Wu, Steve Yang This patch is not for LTS upstream, just for users to cherry-pick. Add L4 support for QinQ switch filter as following flow patterns: eth / vlan / vlan / ipv4 / udp eth / vlan / vlan / ipv4 / tcp eth / vlan / vlan / ipv6 / udp eth / vlan / vlan / ipv6 / tcp Signed-off-by: Steve Yang <stevex.yang@intel.com> Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com> --- drivers/net/ice/ice_switch_filter.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/net/ice/ice_switch_filter.c b/drivers/net/ice/ice_switch_filter.c index 45fa9723d2..eed72d9446 100644 --- a/drivers/net/ice/ice_switch_filter.c +++ b/drivers/net/ice/ice_switch_filter.c @@ -44,6 +44,12 @@ ICE_INSET_IPV4_PROTO | ICE_INSET_IPV4_TTL | ICE_INSET_IPV4_TOS) #define ICE_SW_INSET_MAC_QINQ_IPV4 ( \ ICE_SW_INSET_MAC_QINQ | ICE_SW_INSET_MAC_IPV4) +#define ICE_SW_INSET_MAC_QINQ_IPV4_TCP ( \ + ICE_SW_INSET_MAC_QINQ_IPV4 | \ + ICE_INSET_TCP_DST_PORT | ICE_INSET_TCP_SRC_PORT) +#define ICE_SW_INSET_MAC_QINQ_IPV4_UDP ( \ + ICE_SW_INSET_MAC_QINQ_IPV4 | \ + ICE_INSET_UDP_DST_PORT | ICE_INSET_UDP_SRC_PORT) #define ICE_SW_INSET_MAC_IPV4_TCP ( \ ICE_INSET_DMAC | ICE_INSET_IPV4_DST | ICE_INSET_IPV4_SRC | \ ICE_INSET_IPV4_TTL | ICE_INSET_IPV4_TOS | \ @@ -58,6 +64,12 @@ ICE_INSET_IPV6_NEXT_HDR) #define ICE_SW_INSET_MAC_QINQ_IPV6 ( \ ICE_SW_INSET_MAC_QINQ | ICE_SW_INSET_MAC_IPV6) +#define ICE_SW_INSET_MAC_QINQ_IPV6_TCP ( \ + ICE_SW_INSET_MAC_QINQ_IPV6 | \ + ICE_INSET_TCP_DST_PORT | ICE_INSET_TCP_SRC_PORT) +#define ICE_SW_INSET_MAC_QINQ_IPV6_UDP ( \ + ICE_SW_INSET_MAC_QINQ_IPV6 | \ + ICE_INSET_UDP_DST_PORT | ICE_INSET_UDP_SRC_PORT) #define ICE_SW_INSET_MAC_IPV6_TCP ( \ ICE_INSET_DMAC | ICE_INSET_IPV6_DST | ICE_INSET_IPV6_SRC | \ ICE_INSET_IPV6_HOP_LIMIT | ICE_INSET_IPV6_TC | \ @@ -274,8 +286,16 @@ ice_pattern_match_item ice_switch_pattern_dist_comms[] = { ICE_INSET_NONE, ICE_INSET_NONE}, {pattern_eth_qinq_ipv4, ICE_SW_INSET_MAC_QINQ_IPV4, ICE_INSET_NONE}, + {pattern_eth_qinq_ipv4_tcp, + ICE_SW_INSET_MAC_QINQ_IPV4_TCP, ICE_INSET_NONE}, + {pattern_eth_qinq_ipv4_udp, + ICE_SW_INSET_MAC_QINQ_IPV4_UDP, ICE_INSET_NONE}, {pattern_eth_qinq_ipv6, ICE_SW_INSET_MAC_QINQ_IPV6, ICE_INSET_NONE}, + {pattern_eth_qinq_ipv6_tcp, + ICE_SW_INSET_MAC_QINQ_IPV6_TCP, ICE_INSET_NONE}, + {pattern_eth_qinq_ipv6_udp, + ICE_SW_INSET_MAC_QINQ_IPV6_UDP, ICE_INSET_NONE}, {pattern_eth_qinq_pppoes, ICE_SW_INSET_MAC_PPPOE, ICE_INSET_NONE}, {pattern_eth_qinq_pppoes_proto, @@ -410,8 +430,16 @@ ice_pattern_match_item ice_switch_pattern_perm_comms[] = { ICE_INSET_NONE, ICE_INSET_NONE}, {pattern_eth_qinq_ipv4, ICE_SW_INSET_MAC_QINQ_IPV4, ICE_INSET_NONE}, + {pattern_eth_qinq_ipv4_tcp, + ICE_SW_INSET_MAC_QINQ_IPV4_TCP, ICE_INSET_NONE}, + {pattern_eth_qinq_ipv4_udp, + ICE_SW_INSET_MAC_QINQ_IPV4_UDP, ICE_INSET_NONE}, {pattern_eth_qinq_ipv6, ICE_SW_INSET_MAC_QINQ_IPV6, ICE_INSET_NONE}, + {pattern_eth_qinq_ipv6_tcp, + ICE_SW_INSET_MAC_QINQ_IPV6_TCP, ICE_INSET_NONE}, + {pattern_eth_qinq_ipv6_udp, + ICE_SW_INSET_MAC_QINQ_IPV6_UDP, ICE_INSET_NONE}, {pattern_eth_qinq_pppoes, ICE_SW_INSET_MAC_PPPOE, ICE_INSET_NONE}, {pattern_eth_qinq_pppoes_proto, -- 2.25.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH 20.11 7/7] net/ice/base: support L4 for QinQ switch filter 2021-09-10 8:08 [dpdk-dev] [PATCH 20.11 0/7] backport feature support to DPDK 20.11 Wenjun Wu ` (5 preceding siblings ...) 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 6/7] net/ice: add L4 support for QinQ switch filter Wenjun Wu @ 2021-09-10 8:08 ` Wenjun Wu 6 siblings, 0 replies; 8+ messages in thread From: Wenjun Wu @ 2021-09-10 8:08 UTC (permalink / raw) To: dev, qi.z.zhang; +Cc: Steve Yang, Wenjun Wu From: Steve Yang <stevex.yang@intel.com> This patch is not for LTS upstream, just for users to cherry-pick. This patch adds more dummy packet types for QinQ packet, it enables tcp/udp layer of ipv4/ipv6 for QinQ payload, so we can use L4 dst/src port as input set for switch filter. For Example: flow create 0 ingress pattern eth / vlan tci is 2 / vlan tci is 1 \ / ipv4 src is 196.222.232.221 / tcp src is 400 / end actions queue \ index 1 / end Signed-off-by: Steve Yang <stevex.yang@intel.com> Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com> --- drivers/net/ice/base/ice_switch.c | 176 +++++++++++++++++++++++++++++- 1 file changed, 170 insertions(+), 6 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 6c4dfec062..183b169ccd 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -1228,12 +1228,78 @@ static const u8 dummy_qinq_ipv4_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, /* 2 bytes for 4 byte alignment */ +}; + +static const +struct ice_dummy_pkt_offsets dummy_qinq_ipv4_udp_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_ETYPE_OL, 12 }, + { ICE_VLAN_EX, 14 }, + { ICE_VLAN_IN, 18 }, + { ICE_IPV4_OFOS, 22 }, + { ICE_UDP_ILOS, 42 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +static const u8 dummy_qinq_ipv4_udp_pkt[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x91, 0x00, /* ICE_ETYPE_OL 12 */ + + 0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */ + 0x00, 0x00, 0x08, 0x00, /* ICE_VLAN_IN 18 */ + + 0x45, 0x00, 0x00, 0x1c, /* ICE_IPV4_OFOS 22 */ + 0x00, 0x01, 0x00, 0x00, + 0x00, 0x11, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 42 */ 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, /* 2 bytes for 4 byte alignment */ }; +static const +struct ice_dummy_pkt_offsets dummy_qinq_ipv4_tcp_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_ETYPE_OL, 12 }, + { ICE_VLAN_EX, 14 }, + { ICE_VLAN_IN, 18 }, + { ICE_IPV4_OFOS, 22 }, + { ICE_TCP_IL, 42 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +static const u8 dummy_qinq_ipv4_tcp_pkt[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x91, 0x00, /* ICE_ETYPE_OL 12 */ + + 0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */ + 0x00, 0x00, 0x08, 0x00, /* ICE_VLAN_IN 18 */ + + 0x45, 0x00, 0x00, 0x28, /* ICE_IPV4_OFOS 22 */ + 0x00, 0x01, 0x00, 0x00, + 0x00, 0x06, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 42 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, /* 2 bytes for 4 byte alignment */ +}; + static const struct ice_dummy_pkt_offsets dummy_qinq_ipv6_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, @@ -1248,13 +1314,46 @@ static const u8 dummy_qinq_ipv6_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x91, 0x00, /* ICE_ETYPE_OL 12 */ + 0x91, 0x00, /* ICE_ETYPE_OL 12 */ + 0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */ + 0x00, 0x00, 0x86, 0xDD,/* ICE_VLAN_IN 18 */ - 0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */ - 0x00, 0x00, 0x86, 0xDD, /* ICE_VLAN_IN 18 */ + 0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 22 */ + 0x00, 0x00, 0x3b, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, /* 2 bytes for 4 byte alignment */ +}; + +static const +struct ice_dummy_pkt_offsets dummy_qinq_ipv6_udp_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_ETYPE_OL, 12 }, + { ICE_VLAN_EX, 14 }, + { ICE_VLAN_IN, 18 }, + { ICE_IPV6_OFOS, 22 }, + { ICE_UDP_ILOS, 62 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +static const u8 dummy_qinq_ipv6_udp_pkt[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x91, 0x00, /* ICE_ETYPE_OL 12 */ + 0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */ + 0x00, 0x00, 0x86, 0xDD,/* ICE_VLAN_IN 18 */ 0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 22 */ - 0x00, 0x10, 0x11, 0x00, /* Next header UDP */ + 0x00, 0x08, 0x11, 0x00, /* Next header UDP */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -1265,9 +1364,46 @@ static const u8 dummy_qinq_ipv6_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 62 */ - 0x00, 0x10, 0x00, 0x00, + 0x00, 0x08, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, /* needed for ESP packets */ + 0x00, 0x00, /* 2 bytes for 4 byte alignment */ +}; + +static const +struct ice_dummy_pkt_offsets dummy_qinq_ipv6_tcp_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_ETYPE_OL, 12 }, + { ICE_VLAN_EX, 14 }, + { ICE_VLAN_IN, 18 }, + { ICE_IPV6_OFOS, 22 }, + { ICE_TCP_IL, 62 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +static const u8 dummy_qinq_ipv6_tcp_pkt[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x91, 0x00, /* ICE_ETYPE_OL 12 */ + 0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */ + 0x00, 0x00, 0x86, 0xDD, /* ICE_VLAN_IN 18 */ + + 0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 22 */ + 0x00, 0x14, 0x06, 0x00, /* Next header TCP */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 62 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 2 bytes for 4 byte alignment */ @@ -7382,12 +7518,40 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, if ((tun_type == ICE_SW_TUN_AND_NON_TUN_QINQ || tun_type == ICE_NON_TUN_QINQ) && ipv6) { + if (tcp) { + *pkt = dummy_qinq_ipv6_tcp_pkt; + *pkt_len = sizeof(dummy_qinq_ipv6_tcp_pkt); + *offsets = dummy_qinq_ipv6_tcp_packet_offsets; + return; + } + + if (udp) { + *pkt = dummy_qinq_ipv6_udp_pkt; + *pkt_len = sizeof(dummy_qinq_ipv6_udp_pkt); + *offsets = dummy_qinq_ipv6_udp_packet_offsets; + return; + } + *pkt = dummy_qinq_ipv6_pkt; *pkt_len = sizeof(dummy_qinq_ipv6_pkt); *offsets = dummy_qinq_ipv6_packet_offsets; return; } else if (tun_type == ICE_SW_TUN_AND_NON_TUN_QINQ || tun_type == ICE_NON_TUN_QINQ) { + if (tcp) { + *pkt = dummy_qinq_ipv4_tcp_pkt; + *pkt_len = sizeof(dummy_qinq_ipv4_tcp_pkt); + *offsets = dummy_qinq_ipv4_tcp_packet_offsets; + return; + } + + if (udp) { + *pkt = dummy_qinq_ipv4_udp_pkt; + *pkt_len = sizeof(dummy_qinq_ipv4_udp_pkt); + *offsets = dummy_qinq_ipv4_udp_packet_offsets; + return; + } + *pkt = dummy_qinq_ipv4_pkt; *pkt_len = sizeof(dummy_qinq_ipv4_pkt); *offsets = dummy_qinq_ipv4_packet_offsets; -- 2.25.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2021-09-10 8:27 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-09-10 8:08 [dpdk-dev] [PATCH 20.11 0/7] backport feature support to DPDK 20.11 Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 1/7] net/ice: add priority check for flow filters Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 2/7] net/ice: refine flow priority usage Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 3/7] net/ice: support 256 queues Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 4/7] net/ice: fix error set of queue number Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 5/7] net/ice: support 6-tuple RSS Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 6/7] net/ice: add L4 support for QinQ switch filter Wenjun Wu 2021-09-10 8:08 ` [dpdk-dev] [PATCH 20.11 7/7] net/ice/base: support L4 " Wenjun Wu
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