From: <psatheesh@marvell.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>
Cc: <dev@dpdk.org>, Satheesh Paul <psatheesh@marvell.com>
Subject: [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask
Date: Tue, 9 Nov 2021 15:12:04 +0530 [thread overview]
Message-ID: <20211109094204.2343402-2-psatheesh@marvell.com> (raw)
In-Reply-To: <20211109094204.2343402-1-psatheesh@marvell.com>
From: Satheesh Paul <psatheesh@marvell.com>
This patch adds support to configure channel mask which will
be used by rte flow when adding flow rules on SDP interfaces.
Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
---
doc/guides/nics/cnxk.rst | 21 ++++++++++++++
drivers/net/cnxk/cnxk_ethdev_devargs.c | 40 ++++++++++++++++++++++++--
2 files changed, 59 insertions(+), 2 deletions(-)
diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst
index 837ffc02b4..470e01b811 100644
--- a/doc/guides/nics/cnxk.rst
+++ b/doc/guides/nics/cnxk.rst
@@ -276,6 +276,27 @@ Runtime Config Options
set with this custom mask, inbound encrypted traffic from all ports with
matching channel number pattern will be directed to the inline IPSec device.
+- ``SDP device channel and mask`` (default ``none``)
+ Set channel and channel mask configuration for the SDP device. This
+ will be used when creating flow rules on the SDP device.
+
+ By default, for rules created on the SDP device, the RTE Flow API sets the
+ channel number and mask to cover the entire SDP channel range in the channel
+ field of the MCAM entry. This behaviour can be modified using the
+ ``sdp_channel_mask`` ``devargs`` parameter.
+
+ For example::
+
+ -a 0002:1d:00.0,sdp_channel_mask=0x700/0xf00
+
+ With the above configuration, RTE Flow rules API will set the channel
+ and channel mask as 0x700 and 0xF00 in the MCAM entries of the flow rules
+ created on the SDP device. This option needs to be used when more than one
+ SDP interface is in use and RTE Flow rules created need to distinguish
+ between traffic from each SDP interface. The channel and mask combination
+ specified should match all the channels(or rings) configured on the SDP
+ interface.
+
.. note::
Above devarg parameters are configurable per device, user needs to pass the
diff --git a/drivers/net/cnxk/cnxk_ethdev_devargs.c b/drivers/net/cnxk/cnxk_ethdev_devargs.c
index e068f55349..ad7babdf52 100644
--- a/drivers/net/cnxk/cnxk_ethdev_devargs.c
+++ b/drivers/net/cnxk/cnxk_ethdev_devargs.c
@@ -7,6 +7,12 @@
#include "cnxk_ethdev.h"
+struct sdp_channel {
+ bool is_sdp_mask_set;
+ uint16_t channel;
+ uint16_t mask;
+};
+
static int
parse_outb_nb_desc(const char *key, const char *value, void *extra_args)
{
@@ -164,6 +170,27 @@ parse_switch_header_type(const char *key, const char *value, void *extra_args)
return 0;
}
+static int
+parse_sdp_channel_mask(const char *key, const char *value, void *extra_args)
+{
+ RTE_SET_USED(key);
+ uint16_t chan = 0, mask = 0;
+ char *next = 0;
+
+ /* next will point to the separator '/' */
+ chan = strtol(value, &next, 16);
+ mask = strtol(++next, 0, 16);
+
+ if (chan > GENMASK(11, 0) || mask > GENMASK(11, 0))
+ return -EINVAL;
+
+ ((struct sdp_channel *)extra_args)->channel = chan;
+ ((struct sdp_channel *)extra_args)->mask = mask;
+ ((struct sdp_channel *)extra_args)->is_sdp_mask_set = true;
+
+ return 0;
+}
+
#define CNXK_RSS_RETA_SIZE "reta_size"
#define CNXK_SCL_ENABLE "scalar_enable"
#define CNXK_MAX_SQB_COUNT "max_sqb_count"
@@ -177,6 +204,7 @@ parse_switch_header_type(const char *key, const char *value, void *extra_args)
#define CNXK_OUTB_NB_DESC "outb_nb_desc"
#define CNXK_FORCE_INB_INL_DEV "force_inb_inl_dev"
#define CNXK_OUTB_NB_CRYPTO_QS "outb_nb_crypto_qs"
+#define CNXK_SDP_CHANNEL_MASK "sdp_channel_mask"
int
cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)
@@ -191,11 +219,14 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)
uint16_t force_inb_inl_dev = 0;
uint16_t outb_nb_crypto_qs = 1;
uint16_t outb_nb_desc = 8200;
+ struct sdp_channel sdp_chan;
uint16_t rss_tag_as_xor = 0;
uint16_t scalar_enable = 0;
uint8_t lock_rx_ctx = 0;
struct rte_kvargs *kvlist;
+ memset(&sdp_chan, 0, sizeof(sdp_chan));
+
if (devargs == NULL)
goto null_devargs;
@@ -228,6 +259,8 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)
&parse_outb_nb_crypto_qs, &outb_nb_crypto_qs);
rte_kvargs_process(kvlist, CNXK_FORCE_INB_INL_DEV, &parse_flag,
&force_inb_inl_dev);
+ rte_kvargs_process(kvlist, CNXK_SDP_CHANNEL_MASK,
+ &parse_sdp_channel_mask, &sdp_chan);
rte_kvargs_free(kvlist);
null_devargs:
@@ -246,8 +279,10 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)
dev->npc.flow_prealloc_size = flow_prealloc_size;
dev->npc.flow_max_priority = flow_max_priority;
dev->npc.switch_header_type = switch_header_type;
+ dev->npc.sdp_channel = sdp_chan.channel;
+ dev->npc.sdp_channel_mask = sdp_chan.mask;
+ dev->npc.is_sdp_mask_set = sdp_chan.is_sdp_mask_set;
return 0;
-
exit:
return -EINVAL;
}
@@ -263,4 +298,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_cnxk,
CNXK_IPSEC_IN_MAX_SPI "=<1-65535>"
CNXK_OUTB_NB_DESC "=<1-65535>"
CNXK_OUTB_NB_CRYPTO_QS "=<1-64>"
- CNXK_FORCE_INB_INL_DEV "=1");
+ CNXK_FORCE_INB_INL_DEV "=1"
+ CNXK_SDP_CHANNEL_MASK "=<1-4095>/<1-4095>");
--
2.25.4
next prev parent reply other threads:[~2021-11-09 9:42 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-09 9:42 [dpdk-dev] [PATCH 22.02 1/2] common/cnxk: support to set channel mask for SDP interfaces psatheesh
2021-11-09 9:42 ` psatheesh [this message]
2022-01-11 11:56 ` [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask Ferruh Yigit
2022-01-11 14:29 ` [EXT] " Satheesh Paul
2022-01-12 10:57 ` Ferruh Yigit
2021-12-21 10:18 ` [dpdk-dev] [PATCH 22.02 1/2] common/cnxk: support to set channel mask for SDP interfaces Jerin Jacob
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