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From: Rongwei Liu <rongweil@nvidia.com>
To: <matan@nvidia.com>, <viacheslavo@nvidia.com>, <orika@nvidia.com>,
	<thomas@monjalon.net>
Cc: <dev@dpdk.org>, <rasland@nvidia.com>
Subject: [PATCH v1] net/mlx5: add Rx drop counters to xstats
Date: Thu, 26 May 2022 05:49:41 +0300	[thread overview]
Message-ID: <20220526024941.1296966-1-rongweil@nvidia.com> (raw)

Add two kinds of Rx drop counters to DPDK xstats which are
physical port scope.

1. rx_prio[0-7]_buf_discard
   The number of unicast packets dropped due to lack of shared
   buffer resources.
2. rx_prio[0-7]_cong_discard
   The number of packets that is dropped by the Weighted Random
   Early Detection (WRED) function.

Prio[0-7] is determined by VLAN PCP value which is 0 by default.
Both counters are retrieved from kernel ethtool API which calls
PRM command finally.

Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/net/mlx5/linux/mlx5_ethdev_os.c | 66 ++++++++++++++++++++++++-
 drivers/net/mlx5/mlx5_defs.h            |  2 +-
 2 files changed, 66 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mlx5/linux/mlx5_ethdev_os.c b/drivers/net/mlx5/linux/mlx5_ethdev_os.c
index 8fe73f1adb..6fbfcfad48 100644
--- a/drivers/net/mlx5/linux/mlx5_ethdev_os.c
+++ b/drivers/net/mlx5/linux/mlx5_ethdev_os.c
@@ -1526,6 +1526,70 @@ static const struct mlx5_counter_ctrl mlx5_counters_init[] = {
 		.dpdk_name = "rx_phy_discard_packets",
 		.ctr_name = "rx_discards_phy",
 	},
+	{
+		.dpdk_name = "rx_prio0_buf_discard_packets",
+		.ctr_name = "rx_prio0_buf_discard",
+	},
+	{
+		.dpdk_name = "rx_prio1_buf_discard_packets",
+		.ctr_name = "rx_prio1_buf_discard",
+	},
+	{
+		.dpdk_name = "rx_prio2_buf_discard_packets",
+		.ctr_name = "rx_prio2_buf_discard",
+	},
+	{
+		.dpdk_name = "rx_prio3_buf_discard_packets",
+		.ctr_name = "rx_prio3_buf_discard",
+	},
+	{
+		.dpdk_name = "rx_prio4_buf_discard_packets",
+		.ctr_name = "rx_prio4_buf_discard",
+	},
+	{
+		.dpdk_name = "rx_prio5_buf_discard_packets",
+		.ctr_name = "rx_prio5_buf_discard",
+	},
+	{
+		.dpdk_name = "rx_prio6_buf_discard_packets",
+		.ctr_name = "rx_prio6_buf_discard",
+	},
+	{
+		.dpdk_name = "rx_prio7_buf_discard_packets",
+		.ctr_name = "rx_prio7_buf_discard",
+	},
+	{
+		.dpdk_name = "rx_prio0_cong_discard_packets",
+		.ctr_name = "rx_prio0_cong_discard",
+	},
+	{
+		.dpdk_name = "rx_prio1_cong_discard_packets",
+		.ctr_name = "rx_prio1_cong_discard",
+	},
+	{
+		.dpdk_name = "rx_prio2_cong_discard_packets",
+		.ctr_name = "rx_prio2_cong_discard",
+	},
+	{
+		.dpdk_name = "rx_prio3_cong_discard_packets",
+		.ctr_name = "rx_prio3_cong_discard",
+	},
+	{
+		.dpdk_name = "rx_prio4_cong_discard_packets",
+		.ctr_name = "rx_prio4_cong_discard",
+	},
+	{
+		.dpdk_name = "rx_prio5_cong_discard_packets",
+		.ctr_name = "rx_prio5_cong_discard",
+	},
+	{
+		.dpdk_name = "rx_prio6_cong_discard_packets",
+		.ctr_name = "rx_prio6_cong_discard",
+	},
+	{
+		.dpdk_name = "rx_prio7_cong_discard_packets",
+		.ctr_name = "rx_prio7_cong_discard",
+	},
 	{
 		.dpdk_name = "tx_phy_bytes",
 		.ctr_name = "tx_bytes_phy",
@@ -1625,6 +1689,7 @@ mlx5_os_stats_init(struct rte_eth_dev *dev)
 		}
 	}
 	/* Add dev counters. */
+	MLX5_ASSERT(xstats_ctrl->mlx5_stats_n <= MLX5_MAX_XSTATS);
 	for (i = 0; i != xstats_n; ++i) {
 		if (mlx5_counters_init[i].dev) {
 			unsigned int idx = xstats_ctrl->mlx5_stats_n++;
@@ -1633,7 +1698,6 @@ mlx5_os_stats_init(struct rte_eth_dev *dev)
 			xstats_ctrl->hw_stats[idx] = 0;
 		}
 	}
-	MLX5_ASSERT(xstats_ctrl->mlx5_stats_n <= MLX5_MAX_XSTATS);
 	xstats_ctrl->stats_n = dev_stats_n;
 	/* Copy to base at first time. */
 	ret = mlx5_os_read_dev_counters(dev, xstats_ctrl->base);
diff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h
index f5c6f23d56..018d3f0f0c 100644
--- a/drivers/net/mlx5/mlx5_defs.h
+++ b/drivers/net/mlx5/mlx5_defs.h
@@ -47,7 +47,7 @@
 #define MLX5_ALARM_TIMEOUT_US 100000
 
 /* Maximum number of extended statistics counters. */
-#define MLX5_MAX_XSTATS 32
+#define MLX5_MAX_XSTATS 64
 
 /* Maximum Packet headers size (L2+L3+L4) for TSO. */
 #define MLX5_MAX_TSO_HEADER 192U
-- 
2.27.0


             reply	other threads:[~2022-05-26  2:50 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-26  2:49 Rongwei Liu [this message]
2022-05-29 13:34 ` Raslan Darawsheh

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