DPDK patches and discussions
 help / color / mirror / Atom feed
* [PATCH] net/octeon_ep: support SDP packet mode
@ 2023-02-09 12:30 Sathesh Edara
  2023-02-10  9:30 ` Jerin Jacob
  0 siblings, 1 reply; 2+ messages in thread
From: Sathesh Edara @ 2023-02-09 12:30 UTC (permalink / raw)
  To: sburla, jerinj, sedara, Radha Mohan Chintakuntla, Veerasenareddy Burru
  Cc: dev

Add SDP packet mode to support EP driver in loop
and NIC mode.

Signed-off-by: Sathesh Edara <sedara@marvell.com>
---
 drivers/net/octeon_ep/otx2_ep_vf.h    |  2 +-
 drivers/net/octeon_ep/otx_ep_common.h | 30 ++++++++++++++++++++++-----
 drivers/net/octeon_ep/otx_ep_ethdev.c | 20 ++++++++++++------
 drivers/net/octeon_ep/otx_ep_rxtx.c   | 22 +++++++++++++-------
 drivers/net/octeon_ep/otx_ep_rxtx.h   |  3 ++-
 5 files changed, 57 insertions(+), 20 deletions(-)

diff --git a/drivers/net/octeon_ep/otx2_ep_vf.h b/drivers/net/octeon_ep/otx2_ep_vf.h
index 757eeae9f0..00a1e0f9f0 100644
--- a/drivers/net/octeon_ep/otx2_ep_vf.h
+++ b/drivers/net/octeon_ep/otx2_ep_vf.h
@@ -113,7 +113,7 @@
 #define otx2_read64(addr) rte_read64_relaxed((void *)(addr))
 #define otx2_write64(val, addr) rte_write64_relaxed((val), (void *)(addr))
 
-#define PCI_DEVID_CN9K_EP_NET_VF		0xB203 /* OCTEON 9 EP mode */
+#define PCI_DEVID_CN93XX_EP_NET_VF		0xB203
 #define PCI_DEVID_CN98XX_EP_NET_VF		0xB103
 
 int
diff --git a/drivers/net/octeon_ep/otx_ep_common.h b/drivers/net/octeon_ep/otx_ep_common.h
index 7eb50af75a..a5b7a9ac2b 100644
--- a/drivers/net/octeon_ep/otx_ep_common.h
+++ b/drivers/net/octeon_ep/otx_ep_common.h
@@ -31,7 +31,20 @@
 #define OTX_EP_NORESP_LAST          (4)
 #define OTX_EP_PCI_RING_ALIGN   65536
 #define SDP_PKIND 40
-#define SDP_OTX2_PKIND 57
+#define SDP_OTX2_PKIND_FS24 57	/* Front size 24, NIC mode */
+/* Use LBK PKIND */
+#define SDP_OTX2_PKIND_FS0  0	/* Front size 0, LOOP packet mode */
+
+/*
+ * Values for SDP packet mode
+ * NIC: Has 24 byte header Host-> Octeon, 8 byte header Octeon->Host,
+ *      application must handle these
+ * LOOP: No headers, standard DPDK apps work on both ends.
+ * The mode is selected by a parameter provided to the HOST DPDK driver
+ */
+#define SDP_PACKET_MODE_PARAM	"sdp_packet_mode"
+#define SDP_PACKET_MODE_NIC	0x0
+#define SDP_PACKET_MODE_LOOP	0x1
 
 #define      ORDERED_TAG 0
 #define      ATOMIC_TAG  1
@@ -228,11 +241,12 @@ struct otx_ep_droq_desc {
 };
 #define OTX_EP_DROQ_DESC_SIZE	(sizeof(struct otx_ep_droq_desc))
 
-/* Receive Header */
+/* Receive Header, only present in NIC mode. */
 union otx_ep_rh {
 	uint64_t rh64;
 };
-#define OTX_EP_RH_SIZE (sizeof(union otx_ep_rh))
+#define OTX_EP_RH_SIZE_NIC (sizeof(union otx_ep_rh))
+#define OTX_EP_RH_SIZE_LOOP 0  /* Nothing in LOOP mode */
 
 /** Information about packet DMA'ed by OCTEON 9.
  *  The format of the information available at Info Pointer after OCTEON 9
@@ -244,10 +258,13 @@ struct otx_ep_droq_info {
 	/* The Length of the packet. */
 	uint64_t length;
 
-	/* The Output Receive Header. */
+	/* The Output Receive Header, only present in NIC mode */
 	union otx_ep_rh rh;
 };
-#define OTX_EP_DROQ_INFO_SIZE	(sizeof(struct otx_ep_droq_info))
+#define OTX_EP_DROQ_INFO_SIZE_NIC	(sizeof(struct otx_ep_droq_info))
+#define OTX_EP_DROQ_INFO_SIZE_LOOP	(sizeof(struct otx_ep_droq_info) + \
+						OTX_EP_RH_SIZE_LOOP - \
+						OTX_EP_RH_SIZE_NIC)
 
 /* DROQ statistics. Each output queue has four stats fields. */
 struct otx_ep_droq_stats {
@@ -455,6 +472,9 @@ struct otx_ep_device {
 	uint64_t rx_offloads;
 
 	uint64_t tx_offloads;
+
+	/* Packet mode (LOOP vs NIC), set by parameter */
+	uint8_t sdp_packet_mode;
 };
 
 int otx_ep_setup_iqs(struct otx_ep_device *otx_ep, uint32_t iq_no,
diff --git a/drivers/net/octeon_ep/otx_ep_ethdev.c b/drivers/net/octeon_ep/otx_ep_ethdev.c
index c8f4abe4ca..0093524c38 100644
--- a/drivers/net/octeon_ep/otx_ep_ethdev.c
+++ b/drivers/net/octeon_ep/otx_ep_ethdev.c
@@ -3,6 +3,7 @@
  */
 
 #include <ethdev_pci.h>
+#include <rte_kvargs.h>
 
 #include "otx_ep_common.h"
 #include "otx_ep_vf.h"
@@ -103,7 +104,7 @@ otx_ep_chip_specific_setup(struct otx_ep_device *otx_epvf)
 		ret = otx_ep_vf_setup_device(otx_epvf);
 		otx_epvf->fn_list.disable_io_queues(otx_epvf);
 		break;
-	case PCI_DEVID_CN9K_EP_NET_VF:
+	case PCI_DEVID_CN93XX_EP_NET_VF:
 	case PCI_DEVID_CN98XX_EP_NET_VF:
 		otx_epvf->chip_id = dev_id;
 		ret = otx2_ep_vf_setup_device(otx_epvf);
@@ -143,7 +144,7 @@ otx_epdev_init(struct otx_ep_device *otx_epvf)
 	otx_epvf->eth_dev->rx_pkt_burst = &otx_ep_recv_pkts;
 	if (otx_epvf->chip_id == PCI_DEVID_OCTEONTX_EP_VF)
 		otx_epvf->eth_dev->tx_pkt_burst = &otx_ep_xmit_pkts;
-	else if (otx_epvf->chip_id == PCI_DEVID_CN9K_EP_NET_VF ||
+	else if (otx_epvf->chip_id == PCI_DEVID_CN93XX_EP_NET_VF ||
 		 otx_epvf->chip_id == PCI_DEVID_CN98XX_EP_NET_VF)
 		otx_epvf->eth_dev->tx_pkt_burst = &otx2_ep_xmit_pkts;
 	else if (otx_epvf->chip_id == PCI_DEVID_CNXK_EP_NET_VF)
@@ -484,6 +485,8 @@ otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev)
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 		return 0;
 
+	otx_epvf->sdp_packet_mode = SDP_PACKET_MODE_LOOP;
+
 	otx_epvf->eth_dev = eth_dev;
 	otx_epvf->port_id = eth_dev->data->port_id;
 	eth_dev->dev_ops = &otx_ep_eth_dev_ops;
@@ -499,10 +502,15 @@ otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev)
 	otx_epvf->pdev = pdev;
 
 	otx_epdev_init(otx_epvf);
-	if (pdev->id.device_id == PCI_DEVID_CN9K_EP_NET_VF)
-		otx_epvf->pkind = SDP_OTX2_PKIND;
-	else
+	if (pdev->id.device_id == PCI_DEVID_CN93XX_EP_NET_VF ||
+	    pdev->id.device_id == PCI_DEVID_CN98XX_EP_NET_VF) {
+		if (otx_epvf->sdp_packet_mode == SDP_PACKET_MODE_NIC)
+			otx_epvf->pkind = SDP_OTX2_PKIND_FS24;
+		else
+			otx_epvf->pkind = SDP_OTX2_PKIND_FS0;
+	} else {
 		otx_epvf->pkind = SDP_PKIND;
+	}
 	otx_ep_info("using pkind %d\n", otx_epvf->pkind);
 
 	return 0;
@@ -527,7 +535,7 @@ otx_ep_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
 /* Set of PCI devices this driver supports */
 static const struct rte_pci_id pci_id_otx_ep_map[] = {
 	{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX_EP_VF) },
-	{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN9K_EP_NET_VF) },
+	{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN93XX_EP_NET_VF) },
 	{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN98XX_EP_NET_VF) },
 	{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CNXK_EP_NET_VF) },
 	{ .vendor_id = 0, /* sentinel */ }
diff --git a/drivers/net/octeon_ep/otx_ep_rxtx.c b/drivers/net/octeon_ep/otx_ep_rxtx.c
index 59df6ad857..3fe6c2761c 100644
--- a/drivers/net/octeon_ep/otx_ep_rxtx.c
+++ b/drivers/net/octeon_ep/otx_ep_rxtx.c
@@ -20,6 +20,12 @@
 #define INFO_SIZE 8
 #define DROQ_REFILL_THRESHOLD 16
 
+/* These arrays indexed by otx_ep_device->sdp_packet_mode */
+static uint8_t front_size[2] = {OTX2_EP_FSZ_NIC, OTX2_EP_FSZ_LOOP};
+static uint8_t rh_size[2] = {OTX_EP_RH_SIZE_NIC, OTX_EP_RH_SIZE_LOOP};
+static uint8_t droq_info_size[2] = {OTX_EP_DROQ_INFO_SIZE_NIC,
+				    OTX_EP_DROQ_INFO_SIZE_LOOP};
+
 static void
 otx_ep_dmazone_free(const struct rte_memzone *mz)
 {
@@ -678,9 +684,9 @@ otx2_ep_xmit_pkts(void *tx_queue, struct rte_mbuf **pkts, uint16_t nb_pkts)
 	iqcmd2.irh.u64 = 0;
 
 	/* ih invars */
-	iqcmd2.ih.s.fsz = OTX2_EP_FSZ;
+	iqcmd2.ih.s.fsz = front_size[otx_ep->sdp_packet_mode];
 	iqcmd2.ih.s.pkind = otx_ep->pkind; /* The SDK decided PKIND value */
-	/* irh invars */
+	/* irh invars, ignored in LOOP mode */
 	iqcmd2.irh.s.opcode = OTX_EP_NW_PKT_OP;
 
 	for (i = 0; i < nb_pkts; i++) {
@@ -838,7 +844,9 @@ otx_ep_droq_read_packet(struct otx_ep_device *otx_ep,
 	uint64_t total_pkt_len;
 	uint32_t pkt_len = 0;
 	int next_idx;
+	int info_size;
 
+	info_size = droq_info_size[otx_ep->sdp_packet_mode];
 	droq_pkt  = droq->recv_buf_list[droq->read_idx];
 	droq_pkt2  = droq->recv_buf_list[droq->read_idx];
 	info = rte_pktmbuf_mtod(droq_pkt, struct otx_ep_droq_info *);
@@ -877,10 +885,10 @@ otx_ep_droq_read_packet(struct otx_ep_device *otx_ep,
 	/* Deduce the actual data size */
 	total_pkt_len = info->length + INFO_SIZE;
 	if (total_pkt_len <= droq->buffer_size) {
-		info->length -=  OTX_EP_RH_SIZE;
+		info->length -=  rh_size[otx_ep->sdp_packet_mode];
 		droq_pkt  = droq->recv_buf_list[droq->read_idx];
 		if (likely(droq_pkt != NULL)) {
-			droq_pkt->data_off += OTX_EP_DROQ_INFO_SIZE;
+			droq_pkt->data_off += info_size;
 			/* otx_ep_dbg("OQ: pkt_len[%ld], buffer_size %d\n",
 			 * (long)info->length, droq->buffer_size);
 			 */
@@ -917,11 +925,11 @@ otx_ep_droq_read_packet(struct otx_ep_device *otx_ep,
 				droq_pkt->port = otx_ep->port_id;
 				if (!pkt_len) {
 					droq_pkt->data_off +=
-						OTX_EP_DROQ_INFO_SIZE;
+						info_size;
 					droq_pkt->pkt_len =
-						cpy_len - OTX_EP_DROQ_INFO_SIZE;
+						cpy_len - info_size;
 					droq_pkt->data_len =
-						cpy_len - OTX_EP_DROQ_INFO_SIZE;
+						cpy_len - info_size;
 				} else {
 					droq_pkt->pkt_len = cpy_len;
 					droq_pkt->data_len = cpy_len;
diff --git a/drivers/net/octeon_ep/otx_ep_rxtx.h b/drivers/net/octeon_ep/otx_ep_rxtx.h
index 1527d350b5..a7dc1a21c8 100644
--- a/drivers/net/octeon_ep/otx_ep_rxtx.h
+++ b/drivers/net/octeon_ep/otx_ep_rxtx.h
@@ -16,7 +16,8 @@
 #define OTX_EP_MAX_DELAYED_PKT_RETRIES 10000
 
 #define OTX_EP_FSZ 28
-#define OTX2_EP_FSZ 24
+#define OTX2_EP_FSZ_LOOP 0
+#define OTX2_EP_FSZ_NIC 24
 #define OTX_EP_MAX_INSTR 16
 
 static inline void
-- 
2.31.1


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] net/octeon_ep: support SDP packet mode
  2023-02-09 12:30 [PATCH] net/octeon_ep: support SDP packet mode Sathesh Edara
@ 2023-02-10  9:30 ` Jerin Jacob
  0 siblings, 0 replies; 2+ messages in thread
From: Jerin Jacob @ 2023-02-10  9:30 UTC (permalink / raw)
  To: Sathesh Edara
  Cc: sburla, jerinj, Radha Mohan Chintakuntla, Veerasenareddy Burru, dev

On Thu, Feb 9, 2023 at 6:01 PM Sathesh Edara <sedara@marvell.com> wrote:
>
> Add SDP packet mode to support EP driver in loop
> and NIC mode.
>
> Signed-off-by: Sathesh Edara <sedara@marvell.com>
> ---
> +/* These arrays indexed by otx_ep_device->sdp_packet_mode */
> +static uint8_t front_size[2] = {OTX2_EP_FSZ_NIC, OTX2_EP_FSZ_LOOP};
> +static uint8_t rh_size[2] = {OTX_EP_RH_SIZE_NIC, OTX_EP_RH_SIZE_LOOP};
> +static uint8_t droq_info_size[2] = {OTX_EP_DROQ_INFO_SIZE_NIC,
> +                                   OTX_EP_DROQ_INFO_SIZE_LOOP};

No need to provide 2.

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2023-02-10  9:30 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-02-09 12:30 [PATCH] net/octeon_ep: support SDP packet mode Sathesh Edara
2023-02-10  9:30 ` Jerin Jacob

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).