* [PATCH 1/3] net/ixgbevf: fix Rx and Tx queue status get
2023-07-12 7:42 [PATCH 0/3] fix Rx and Tx queue status get Qiming Yang
@ 2023-07-12 7:42 ` Qiming Yang
2023-07-12 7:42 ` [PATCH 2/3] net/igc: " Qiming Yang
2023-07-12 7:42 ` [PATCH 3/3] net/e1000: fix Rx and Tx queue status Qiming Yang
2 siblings, 0 replies; 4+ messages in thread
From: Qiming Yang @ 2023-07-12 7:42 UTC (permalink / raw)
To: dev; +Cc: beilei.xing, qi.z.zhang, Qiming Yang, Jie Hai
Ixgbevf driver don't enable queue start/stop functions, queue status is not
updated when the HW queue enabled or disabled. It caused application can't
get correct queue status.
This patch fixes the issue by updating the queue states when the queue is
disabled or enabled.
Fixes: 429c6d86b371 ("ixgbe: prepare for vector pmd")
Fixes: f0c50e5f56fa ("ixgbe: move PMD specific fields out of base driver")
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Signed-off-by: Jie Hai <haijie1@huawei.com>
---
drivers/net/ixgbe/ixgbe_rxtx.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index 61f17cd90b..954ef241a0 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -3378,6 +3378,7 @@ ixgbe_dev_clear_queues(struct rte_eth_dev *dev)
if (txq != NULL) {
txq->ops->release_mbufs(txq);
txq->ops->reset(txq);
+ dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
}
}
@@ -3387,6 +3388,7 @@ ixgbe_dev_clear_queues(struct rte_eth_dev *dev)
if (rxq != NULL) {
ixgbe_rx_queue_release_mbufs(rxq);
ixgbe_reset_rx_queue(adapter, rxq);
+ dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
}
}
/* If loopback mode was enabled, reconfigure the link accordingly */
@@ -5896,6 +5898,8 @@ ixgbevf_dev_rxtx_start(struct rte_eth_dev *dev)
} while (--poll_ms && !(txdctl & IXGBE_TXDCTL_ENABLE));
if (!poll_ms)
PMD_INIT_LOG(ERR, "Could not enable Tx Queue %d", i);
+ else
+ dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
}
for (i = 0; i < dev->data->nb_rx_queues; i++) {
@@ -5913,6 +5917,8 @@ ixgbevf_dev_rxtx_start(struct rte_eth_dev *dev)
} while (--poll_ms && !(rxdctl & IXGBE_RXDCTL_ENABLE));
if (!poll_ms)
PMD_INIT_LOG(ERR, "Could not enable Rx Queue %d", i);
+ else
+ dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
rte_wmb();
IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), rxq->nb_rx_desc - 1);
--
2.25.1
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH 2/3] net/igc: fix Rx and Tx queue status get
2023-07-12 7:42 [PATCH 0/3] fix Rx and Tx queue status get Qiming Yang
2023-07-12 7:42 ` [PATCH 1/3] net/ixgbevf: " Qiming Yang
@ 2023-07-12 7:42 ` Qiming Yang
2023-07-12 7:42 ` [PATCH 3/3] net/e1000: fix Rx and Tx queue status Qiming Yang
2 siblings, 0 replies; 4+ messages in thread
From: Qiming Yang @ 2023-07-12 7:42 UTC (permalink / raw)
To: dev; +Cc: beilei.xing, qi.z.zhang, Qiming Yang, Mingjin Ye
Igc driver don't enable queue start/stop functions, queue status is not
updated when the HW queue enabled or disabled. It caused application can't
get correct queue status.
This patch fixes the issue by updating the queue states when the queue is
disabled or enabled.
Fixes: a5aeb2b9e225 ("net/igc: support Rx and Tx")
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Signed-off-by: Mingjin Ye <mingjinx.ye@intel.com>
---
drivers/net/igc/igc_txrx.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/net/igc/igc_txrx.c b/drivers/net/igc/igc_txrx.c
index c11b6f7f25..5c60e3e997 100644
--- a/drivers/net/igc/igc_txrx.c
+++ b/drivers/net/igc/igc_txrx.c
@@ -1215,6 +1215,7 @@ igc_rx_init(struct rte_eth_dev *dev)
dvmolr |= IGC_DVMOLR_STRCRC;
IGC_WRITE_REG(hw, IGC_DVMOLR(rxq->reg_idx), dvmolr);
+ dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
}
return 0;
@@ -1888,6 +1889,7 @@ igc_dev_clear_queues(struct rte_eth_dev *dev)
if (txq != NULL) {
igc_tx_queue_release_mbufs(txq);
igc_reset_tx_queue(txq);
+ dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
}
}
@@ -1896,6 +1898,7 @@ igc_dev_clear_queues(struct rte_eth_dev *dev)
if (rxq != NULL) {
igc_rx_queue_release_mbufs(rxq);
igc_reset_rx_queue(rxq);
+ dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
}
}
}
@@ -2143,6 +2146,7 @@ igc_tx_init(struct rte_eth_dev *dev)
IGC_TXDCTL_WTHRESH_MSK;
txdctl |= IGC_TXDCTL_QUEUE_ENABLE;
IGC_WRITE_REG(hw, IGC_TXDCTL(txq->reg_idx), txdctl);
+ dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
}
if (offloads & RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP) {
--
2.25.1
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH 3/3] net/e1000: fix Rx and Tx queue status
2023-07-12 7:42 [PATCH 0/3] fix Rx and Tx queue status get Qiming Yang
2023-07-12 7:42 ` [PATCH 1/3] net/ixgbevf: " Qiming Yang
2023-07-12 7:42 ` [PATCH 2/3] net/igc: " Qiming Yang
@ 2023-07-12 7:42 ` Qiming Yang
2 siblings, 0 replies; 4+ messages in thread
From: Qiming Yang @ 2023-07-12 7:42 UTC (permalink / raw)
To: dev; +Cc: beilei.xing, qi.z.zhang, Qiming Yang, Mingjin Ye
Igb driver don't enable queue start/stop functions, queue status is not
updated when the HW queue enabled or disabled. It caused application can't
get correct queue status.
This patch fixes the issue by updating the queue states when the queue is
disabled or enabled.
Fixes: be2d648a2dd3 ("igb: add PF support")
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Signed-off-by: Mingjin Ye <mingjinx.ye@intel.com>
---
drivers/net/e1000/igb_rxtx.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c
index 25ad9eb4e5..61c6394310 100644
--- a/drivers/net/e1000/igb_rxtx.c
+++ b/drivers/net/e1000/igb_rxtx.c
@@ -1854,6 +1854,7 @@ igb_dev_clear_queues(struct rte_eth_dev *dev)
if (txq != NULL) {
igb_tx_queue_release_mbufs(txq);
igb_reset_tx_queue(txq, dev);
+ dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
}
}
@@ -1862,6 +1863,7 @@ igb_dev_clear_queues(struct rte_eth_dev *dev)
if (rxq != NULL) {
igb_rx_queue_release_mbufs(rxq);
igb_reset_rx_queue(rxq);
+ dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
}
}
}
@@ -2442,6 +2444,7 @@ eth_igb_rx_init(struct rte_eth_dev *dev)
rxdctl |= ((rxq->hthresh & 0x1F) << 8);
rxdctl |= ((rxq->wthresh & 0x1F) << 16);
E1000_WRITE_REG(hw, E1000_RXDCTL(rxq->reg_idx), rxdctl);
+ dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
}
if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
@@ -2606,6 +2609,7 @@ eth_igb_tx_init(struct rte_eth_dev *dev)
txdctl |= ((txq->wthresh & 0x1F) << 16);
txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
E1000_WRITE_REG(hw, E1000_TXDCTL(txq->reg_idx), txdctl);
+ dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
}
/* Program the Transmit Control Register. */
--
2.25.1
^ permalink raw reply [flat|nested] 4+ messages in thread