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From: Amit Prakash Shukla <amitprakashs@marvell.com>
To: Chengwen Feng <fengchengwen@huawei.com>,
	Kevin Laatz <kevin.laatz@intel.com>,
	Bruce Richardson <bruce.richardson@intel.com>
Cc: <dev@dpdk.org>, <jerinj@marvell.com>, <conor.walsh@intel.com>,
	<vattunuru@marvell.com>, <g.singh@nxp.com>,
	<sachin.saxena@oss.nxp.com>, <hemant.agrawal@nxp.com>,
	<cheng1.jiang@intel.com>, <ndabilpuram@marvell.com>,
	<anoobj@marvell.com>,
	Amit Prakash Shukla <amitprakashs@marvell.com>
Subject: [RFC PATCH] dmadev: offload to free source buffer
Date: Wed, 9 Aug 2023 11:38:35 +0530	[thread overview]
Message-ID: <20230809060835.2030833-1-amitprakashs@marvell.com> (raw)

This changeset adds support in DMA library to free source DMA buffer by
hardware. On a supported hardware, application can pass on the mempool
information as part of vchan config when the DMA transfer direction is
configured as RTE_DMA_DIR_MEM_TO_DEV.

Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
---
 lib/dmadev/rte_dmadev.h | 45 +++++++++++++++++++++++++++++------------
 1 file changed, 32 insertions(+), 13 deletions(-)

diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h
index e61d71959e..98539e5830 100644
--- a/lib/dmadev/rte_dmadev.h
+++ b/lib/dmadev/rte_dmadev.h
@@ -241,26 +241,26 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
  * @see struct rte_dma_info::dev_capa
  */
 /** Support memory-to-memory transfer */
-#define RTE_DMA_CAPA_MEM_TO_MEM		RTE_BIT64(0)
+#define RTE_DMA_CAPA_MEM_TO_MEM				RTE_BIT64(0)
 /** Support memory-to-device transfer. */
-#define RTE_DMA_CAPA_MEM_TO_DEV		RTE_BIT64(1)
+#define RTE_DMA_CAPA_MEM_TO_DEV				RTE_BIT64(1)
 /** Support device-to-memory transfer. */
-#define RTE_DMA_CAPA_DEV_TO_MEM		RTE_BIT64(2)
+#define RTE_DMA_CAPA_DEV_TO_MEM				RTE_BIT64(2)
 /** Support device-to-device transfer. */
-#define RTE_DMA_CAPA_DEV_TO_DEV		RTE_BIT64(3)
+#define RTE_DMA_CAPA_DEV_TO_DEV				RTE_BIT64(3)
 /** Support SVA which could use VA as DMA address.
  * If device support SVA then application could pass any VA address like memory
  * from rte_malloc(), rte_memzone(), malloc, stack memory.
  * If device don't support SVA, then application should pass IOVA address which
  * from rte_malloc(), rte_memzone().
  */
-#define RTE_DMA_CAPA_SVA                RTE_BIT64(4)
+#define RTE_DMA_CAPA_SVA				RTE_BIT64(4)
 /** Support work in silent mode.
  * In this mode, application don't required to invoke rte_dma_completed*()
  * API.
  * @see struct rte_dma_conf::silent_mode
  */
-#define RTE_DMA_CAPA_SILENT             RTE_BIT64(5)
+#define RTE_DMA_CAPA_SILENT				RTE_BIT64(5)
 /** Supports error handling
  *
  * With this bit set, invalid input addresses will be reported as operation failures
@@ -268,16 +268,18 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
  * Without this bit set, invalid data is not handled by either HW or driver, so user
  * must ensure that all memory addresses are valid and accessible by HW.
  */
-#define RTE_DMA_CAPA_HANDLES_ERRORS	RTE_BIT64(6)
+#define RTE_DMA_CAPA_HANDLES_ERRORS			RTE_BIT64(6)
 /** Support copy operation.
  * This capability start with index of 32, so that it could leave gap between
  * normal capability and ops capability.
  */
-#define RTE_DMA_CAPA_OPS_COPY           RTE_BIT64(32)
+#define RTE_DMA_CAPA_OPS_COPY				RTE_BIT64(32)
 /** Support scatter-gather list copy operation. */
-#define RTE_DMA_CAPA_OPS_COPY_SG	RTE_BIT64(33)
+#define RTE_DMA_CAPA_OPS_COPY_SG			RTE_BIT64(33)
 /** Support fill operation. */
-#define RTE_DMA_CAPA_OPS_FILL		RTE_BIT64(34)
+#define RTE_DMA_CAPA_OPS_FILL				RTE_BIT64(34)
+/** Support for source buffer free for mem to dev transfer. */
+#define RTE_DMA_CAPA_MEM_TO_DEV_SOURCE_BUFFER_FREE	RTE_BIT64(35)
 /**@}*/
 
 /**
@@ -582,6 +584,16 @@ struct rte_dma_vchan_conf {
 	 * @see struct rte_dma_port_param
 	 */
 	struct rte_dma_port_param dst_port;
+	/** mempool from which source buffer is allocated. mempool info is used
+	 * for freeing source buffer by hardware when configured direction is
+	 * RTE_DMA_DIR_MEM_TO_DEV. To free the source buffer by hardware,
+	 * RTE_DMA_OP_FLAG_FREE_SBUF must be set while calling rte_dma_copy and
+	 * rte_dma_copy_sg().
+	 *
+	 * @see RTE_DMA_OP_FLAG_FREE_SBUF
+	 */
+	struct rte_mempool *mem_to_dev_src_buf_pool;
+
 };
 
 /**
@@ -808,17 +820,24 @@ struct rte_dma_sge {
  * If the specify DMA HW works in-order (it means it has default fence between
  * operations), this flag could be NOP.
  */
-#define RTE_DMA_OP_FLAG_FENCE   RTE_BIT64(0)
+#define RTE_DMA_OP_FLAG_FENCE      RTE_BIT64(0)
 /** Submit flag.
  * It means the operation with this flag must issue doorbell to hardware after
  * enqueued jobs.
  */
-#define RTE_DMA_OP_FLAG_SUBMIT  RTE_BIT64(1)
+#define RTE_DMA_OP_FLAG_SUBMIT     RTE_BIT64(1)
 /** Write data to low level cache hint.
  * Used for performance optimization, this is just a hint, and there is no
  * capability bit for this, driver should not return error if this flag was set.
  */
-#define RTE_DMA_OP_FLAG_LLC     RTE_BIT64(2)
+#define RTE_DMA_OP_FLAG_LLC        RTE_BIT64(2)
+/** Mem to dev source buffer free flag.
+ * Used for freeing source DMA buffer by hardware when the transfer direction is
+ * configured as RTE_DMA_DIR_MEM_TO_DEV.
+ *
+ * @see struct rte_dma_vchan_conf::mem_to_dev_src_buf_pool
+ */
+#define RTE_DMA_OP_FLAG_FREE_SBUF  RTE_BIT64(3)
 /**@}*/
 
 /**
-- 
2.25.1


             reply	other threads:[~2023-08-09  6:08 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-09  6:08 Amit Prakash Shukla [this message]
2023-08-09  9:07 ` Morten Brørup
2023-08-09 14:27   ` Amit Prakash Shukla
2023-08-09 14:48     ` Morten Brørup
2023-08-09 18:11       ` Amit Prakash Shukla
2023-08-10  9:32         ` Morten Brørup
2023-08-10 10:27           ` Amit Prakash Shukla
2023-08-10 11:35             ` Morten Brørup
2023-08-10 12:11               ` Amit Prakash Shukla
2023-08-10 16:53 ` [RFC PATCH v2] " Amit Prakash Shukla
2023-08-10 18:20   ` Morten Brørup

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