From: Amit Prakash Shukla <amitprakashs@marvell.com>
To: Vamsi Attunuru <vattunuru@marvell.com>
Cc: <dev@dpdk.org>, <jerinj@marvell.com>,
Amit Prakash Shukla <amitprakashs@marvell.com>
Subject: [PATCH v5 02/12] dma/cnxk: support for burst capacity
Date: Wed, 23 Aug 2023 16:45:15 +0530 [thread overview]
Message-ID: <20230823111525.3975662-2-amitprakashs@marvell.com> (raw)
In-Reply-To: <20230823111525.3975662-1-amitprakashs@marvell.com>
Adds support for the burst capacity. Call to the function return
number of vacant space in descriptor ring for the current burst.
Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
---
v2:
- Fix for bugs observed in v1.
- Squashed few commits.
v3:
- Resolved review suggestions.
- Code improvement.
v4:
- Resolved checkpatch warnings.
v5:
- Updated commit message.
- Split the commits.
drivers/dma/cnxk/cnxk_dmadev.c | 125 ++++++++++++++++++++++-----------
drivers/dma/cnxk/cnxk_dmadev.h | 6 +-
2 files changed, 87 insertions(+), 44 deletions(-)
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index a6f4a31e0e..f06c979b9c 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -108,6 +108,7 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC;
dpivf->conf.c_desc.head = 0;
dpivf->conf.c_desc.tail = 0;
+ dpivf->pending = 0;
return 0;
}
@@ -164,6 +165,7 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC;
dpivf->conf.c_desc.head = 0;
dpivf->conf.c_desc.tail = 0;
+ dpivf->pending = 0;
return 0;
}
@@ -174,7 +176,8 @@ cnxk_dmadev_start(struct rte_dma_dev *dev)
struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
dpivf->desc_idx = 0;
- dpivf->num_words = 0;
+ dpivf->pending = 0;
+ dpivf->pnum_words = 0;
roc_dpi_enable(&dpivf->rdpi);
return 0;
@@ -294,7 +297,7 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src,
comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
comp_ptr->cdata = DPI_REQ_CDATA;
header->cn9k.ptr = (uint64_t)comp_ptr;
- STRM_INC(dpivf->conf.c_desc);
+ STRM_INC(dpivf->conf.c_desc, tail);
header->cn9k.nfst = 1;
header->cn9k.nlst = 1;
@@ -322,17 +325,21 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src,
dpivf->cmd[num_words++] = lptr;
rc = __dpi_queue_write(&dpivf->rdpi, dpivf->cmd, num_words);
- if (!rc) {
- if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
- rte_wmb();
- plt_write64(num_words,
- dpivf->rdpi.rbase + DPI_VDMA_DBELL);
- dpivf->stats.submitted++;
- }
- dpivf->num_words += num_words;
+ if (unlikely(rc)) {
+ STRM_DEC(dpivf->conf.c_desc, tail);
+ return rc;
}
- return dpivf->desc_idx++;
+ if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
+ rte_wmb();
+ plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL);
+ dpivf->stats.submitted++;
+ } else {
+ dpivf->pnum_words += num_words;
+ dpivf->pending++;
+ }
+
+ return (dpivf->desc_idx++);
}
static int
@@ -353,7 +360,7 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan,
comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
comp_ptr->cdata = DPI_REQ_CDATA;
header->cn9k.ptr = (uint64_t)comp_ptr;
- STRM_INC(dpivf->conf.c_desc);
+ STRM_INC(dpivf->conf.c_desc, tail);
/*
* For inbound case, src pointers are last pointers.
@@ -388,17 +395,21 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan,
}
rc = __dpi_queue_write(&dpivf->rdpi, dpivf->cmd, num_words);
- if (!rc) {
- if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
- rte_wmb();
- plt_write64(num_words,
- dpivf->rdpi.rbase + DPI_VDMA_DBELL);
- dpivf->stats.submitted += nb_src;
- }
- dpivf->num_words += num_words;
+ if (unlikely(rc)) {
+ STRM_DEC(dpivf->conf.c_desc, tail);
+ return rc;
}
- return (rc < 0) ? rc : dpivf->desc_idx++;
+ if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
+ rte_wmb();
+ plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL);
+ dpivf->stats.submitted += nb_src;
+ } else {
+ dpivf->pnum_words += num_words;
+ dpivf->pending++;
+ }
+
+ return (dpivf->desc_idx++);
}
static int
@@ -417,7 +428,7 @@ cn10k_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src,
comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
comp_ptr->cdata = DPI_REQ_CDATA;
header->cn10k.ptr = (uint64_t)comp_ptr;
- STRM_INC(dpivf->conf.c_desc);
+ STRM_INC(dpivf->conf.c_desc, tail);
header->cn10k.nfst = 1;
header->cn10k.nlst = 1;
@@ -436,14 +447,18 @@ cn10k_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src,
dpivf->cmd[num_words++] = lptr;
rc = __dpi_queue_write(&dpivf->rdpi, dpivf->cmd, num_words);
- if (!rc) {
- if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
- rte_wmb();
- plt_write64(num_words,
- dpivf->rdpi.rbase + DPI_VDMA_DBELL);
- dpivf->stats.submitted++;
- }
- dpivf->num_words += num_words;
+ if (unlikely(rc)) {
+ STRM_DEC(dpivf->conf.c_desc, tail);
+ return rc;
+ }
+
+ if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
+ rte_wmb();
+ plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL);
+ dpivf->stats.submitted++;
+ } else {
+ dpivf->pnum_words += num_words;
+ dpivf->pending++;
}
return dpivf->desc_idx++;
@@ -467,7 +482,7 @@ cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan,
comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
comp_ptr->cdata = DPI_REQ_CDATA;
header->cn10k.ptr = (uint64_t)comp_ptr;
- STRM_INC(dpivf->conf.c_desc);
+ STRM_INC(dpivf->conf.c_desc, tail);
header->cn10k.nfst = nb_src & 0xf;
header->cn10k.nlst = nb_dst & 0xf;
@@ -492,17 +507,21 @@ cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan,
}
rc = __dpi_queue_write(&dpivf->rdpi, dpivf->cmd, num_words);
- if (!rc) {
- if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
- rte_wmb();
- plt_write64(num_words,
- dpivf->rdpi.rbase + DPI_VDMA_DBELL);
- dpivf->stats.submitted += nb_src;
- }
- dpivf->num_words += num_words;
+ if (unlikely(rc)) {
+ STRM_DEC(dpivf->conf.c_desc, tail);
+ return rc;
+ }
+
+ if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
+ rte_wmb();
+ plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL);
+ dpivf->stats.submitted += nb_src;
+ } else {
+ dpivf->pnum_words += num_words;
+ dpivf->pending++;
}
- return (rc < 0) ? rc : dpivf->desc_idx++;
+ return (dpivf->desc_idx++);
}
static uint16_t
@@ -566,14 +585,35 @@ cnxk_dmadev_completed_status(void *dev_private, uint16_t vchan,
return cnt;
}
+static uint16_t
+cnxk_damdev_burst_capacity(const void *dev_private, uint16_t vchan)
+{
+ const struct cnxk_dpi_vf_s *dpivf = (const struct cnxk_dpi_vf_s *)dev_private;
+ uint16_t burst_cap;
+
+ RTE_SET_USED(vchan);
+
+ burst_cap = dpivf->conf.c_desc.max_cnt -
+ ((dpivf->stats.submitted - dpivf->stats.completed) + dpivf->pending) + 1;
+
+ return burst_cap;
+}
+
static int
cnxk_dmadev_submit(void *dev_private, uint16_t vchan __rte_unused)
{
struct cnxk_dpi_vf_s *dpivf = dev_private;
+ uint32_t num_words = dpivf->pnum_words;
+
+ if (!dpivf->pnum_words)
+ return 0;
rte_wmb();
- plt_write64(dpivf->num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL);
- dpivf->stats.submitted++;
+ plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL);
+
+ dpivf->stats.submitted += dpivf->pending;
+ dpivf->pnum_words = 0;
+ dpivf->pending = 0;
return 0;
}
@@ -666,6 +706,7 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused,
dmadev->fp_obj->submit = cnxk_dmadev_submit;
dmadev->fp_obj->completed = cnxk_dmadev_completed;
dmadev->fp_obj->completed_status = cnxk_dmadev_completed_status;
+ dmadev->fp_obj->burst_capacity = cnxk_damdev_burst_capacity;
if (pci_dev->id.subsystem_device_id == PCI_SUBSYSTEM_DEVID_CN10KA ||
pci_dev->id.subsystem_device_id == PCI_SUBSYSTEM_DEVID_CNF10KA ||
diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h
index e1f5694f50..943e9e3013 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.h
+++ b/drivers/dma/cnxk/cnxk_dmadev.h
@@ -7,7 +7,8 @@
#define DPI_MAX_POINTER 15
#define DPI_QUEUE_STOP 0x0
#define DPI_QUEUE_START 0x1
-#define STRM_INC(s) ((s).tail = ((s).tail + 1) % (s).max_cnt)
+#define STRM_INC(s, var) ((s).var = ((s).var + 1) & (s).max_cnt)
+#define STRM_DEC(s, var) ((s).var = ((s).var - 1) == -1 ? (s).max_cnt : ((s).var - 1))
#define DPI_MAX_DESC 1024
/* Set Completion data to 0xFF when request submitted,
@@ -37,7 +38,8 @@ struct cnxk_dpi_vf_s {
struct cnxk_dpi_conf conf;
struct rte_dma_stats stats;
uint64_t cmd[DPI_MAX_CMD_SIZE];
- uint32_t num_words;
+ uint16_t pending;
+ uint16_t pnum_words;
uint16_t desc_idx;
};
--
2.25.1
next prev parent reply other threads:[~2023-08-23 11:16 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-28 17:18 [PATCH 1/7] dma/cnxk: changes for dmadev autotest Amit Prakash Shukla
2023-06-28 17:18 ` [PATCH 2/7] drivers: changes for dmadev driver Amit Prakash Shukla
2023-06-28 17:18 ` [PATCH 3/7] dma/cnxk: add DMA devops for all models of cn10xxx Amit Prakash Shukla
2023-06-28 17:18 ` [PATCH 4/7] dma/cnxk: update func field based on transfer type Amit Prakash Shukla
2023-06-28 17:18 ` [PATCH 5/7] dma/cnxk: increase vchan per queue to max 4 Amit Prakash Shukla
2023-06-28 17:18 ` [PATCH 6/7] dma/cnxk: vchan support enhancement Amit Prakash Shukla
2023-06-28 17:18 ` [PATCH 7/7] common/cnxk: use unique name for DPI memzone Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 1/7] drivers: changes for dmadev driver Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 2/7] dma/cnxk: add DMA devops for all models of cn10xxx Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 3/7] dma/cnxk: update func field based on transfer type Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 4/7] dma/cnxk: increase vchan per queue to max 4 Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 5/7] dma/cnxk: vchan support enhancement Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 6/7] common/cnxk: use unique name for DPI memzone Amit Prakash Shukla
2023-07-31 12:12 ` [PATCH v2 7/7] dma/cnxk: add completion ring tail wrap check Amit Prakash Shukla
2023-08-16 8:13 ` [PATCH v2 1/7] drivers: changes for dmadev driver Jerin Jacob
2023-08-16 10:09 ` [EXT] " Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 1/8] common/cnxk: use unique name for DPI memzone Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 2/8] dma/cnxk: changes for dmadev driver Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 3/8] dma/cnxk: add DMA devops for all models of cn10xxx Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 4/8] dma/cnxk: update func field based on transfer type Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 5/8] dma/cnxk: increase vchan per queue to max 4 Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 6/8] dma/cnxk: vchan support enhancement Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 7/8] dma/cnxk: add completion ring tail wrap check Amit Prakash Shukla
2023-08-18 9:01 ` [PATCH v3 8/8] dma/cnxk: fix last index return value Amit Prakash Shukla
2023-08-21 13:27 ` [PATCH v3 1/8] common/cnxk: use unique name for DPI memzone Jerin Jacob
2023-08-21 17:49 ` [PATCH v4 " Amit Prakash Shukla
2023-08-21 17:49 ` [PATCH v4 2/8] dma/cnxk: changes for dmadev driver Amit Prakash Shukla
2023-08-21 17:49 ` [PATCH v4 3/8] dma/cnxk: add DMA devops for all models of cn10xxx Amit Prakash Shukla
2023-08-21 17:49 ` [PATCH v4 4/8] dma/cnxk: update func field based on transfer type Amit Prakash Shukla
2023-08-21 17:49 ` [PATCH v4 5/8] dma/cnxk: increase vchan per queue to max 4 Amit Prakash Shukla
2023-08-21 17:49 ` [PATCH v4 6/8] dma/cnxk: vchan support enhancement Amit Prakash Shukla
2023-08-21 17:49 ` [PATCH v4 7/8] dma/cnxk: add completion ring tail wrap check Amit Prakash Shukla
2023-08-21 17:49 ` [PATCH v4 8/8] dma/cnxk: track last index return value Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 01/12] common/cnxk: use unique name for DPI memzone Amit Prakash Shukla
2023-08-23 11:15 ` Amit Prakash Shukla [this message]
2023-08-23 11:15 ` [PATCH v5 03/12] dma/cnxk: set dmadev to ready state Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 04/12] dma/cnxk: flag support for dma device Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 05/12] dma/cnxk: allocate completion ring buffer Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 06/12] dma/cnxk: chunk buffer failure return code Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 07/12] dma/cnxk: add DMA devops for all models of cn10xxx Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 08/12] dma/cnxk: update func field based on transfer type Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 09/12] dma/cnxk: increase vchan per queue to max 4 Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 10/12] dma/cnxk: vchan support enhancement Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 11/12] dma/cnxk: add completion ring tail wrap check Amit Prakash Shukla
2023-08-23 11:15 ` [PATCH v5 12/12] dma/cnxk: track last index return value Amit Prakash Shukla
2023-08-23 15:30 ` [PATCH v5 01/12] common/cnxk: use unique name for DPI memzone Jerin Jacob
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230823111525.3975662-2-amitprakashs@marvell.com \
--to=amitprakashs@marvell.com \
--cc=dev@dpdk.org \
--cc=jerinj@marvell.com \
--cc=vattunuru@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).