[PATCH] net/mlx5/hws: fix integrity bits level

[PATCH] net/mlx5/hws: fix integrity bits level

[Alexander Kozyrev]

The level field in the integrity item is not taken into account
in the current implementation of hardware steering.
Use this value instead of trying to find out the encapsulation
level according to the protocol items involved.

Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_definer.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 95b5d4b70e..600544c044 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -1716,7 +1716,6 @@ mlx5dr_definer_conv_item_integrity(struct mlx5dr_definer_conv_data *cd,
 {
 	const struct rte_flow_item_integrity *m = item->mask;
 	struct mlx5dr_definer_fc *fc;
-	bool inner = cd->tunnel;
 
 	if (!m)
 		return 0;
@@ -1727,7 +1726,7 @@ mlx5dr_definer_conv_item_integrity(struct mlx5dr_definer_conv_data *cd,
 	}
 
 	if (m->l3_ok || m->ipv4_csum_ok || m->l4_ok || m->l4_csum_ok) {
-		fc = &cd->fc[DR_CALC_FNAME(INTEGRITY, inner)];
+		fc = &cd->fc[DR_CALC_FNAME(INTEGRITY, m->level)];
 		fc->item_idx = item_idx;
 		fc->tag_set = &mlx5dr_definer_integrity_set;
 		DR_CALC_SET_HDR(fc, oks1, oks1_bits);
@@ -2282,8 +2281,7 @@ mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx,
 			break;
 		case RTE_FLOW_ITEM_TYPE_INTEGRITY:
 			ret = mlx5dr_definer_conv_item_integrity(&cd, items, i);
-			item_flags |= cd.tunnel ? MLX5_FLOW_ITEM_INNER_INTEGRITY :
-						  MLX5_FLOW_ITEM_OUTER_INTEGRITY;
+			item_flags |= MLX5_FLOW_ITEM_INTEGRITY;
 			break;
 		case RTE_FLOW_ITEM_TYPE_CONNTRACK:
 			ret = mlx5dr_definer_conv_item_conntrack(&cd, items, i);
-- 
2.18.2

RE: [PATCH] net/mlx5/hws: fix integrity bits level

[Ori Kam]

Hi Alex,

> -----Original Message-----
> From: Alexander Kozyrev <akozyrev@nvidia.com>
> Sent: Wednesday, October 25, 2023 11:41 PM
> 
> The level field in the integrity item is not taken into account
> in the current implementation of hardware steering.
> Use this value instead of trying to find out the encapsulation
> level according to the protocol items involved.
> 
> Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
> 
> Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
> ---

Acked-by: Ori Kam <orika@nvidia.com>
Best,
Ori

RE: [PATCH] net/mlx5/hws: fix integrity bits level

[Raslan Darawsheh]

Hi,

> -----Original Message-----
> From: Alexander Kozyrev <akozyrev@nvidia.com>
> Sent: Wednesday, October 25, 2023 11:41 PM
> To: dev@dpdk.org
> Cc: Ori Kam <orika@nvidia.com>; Matan Azrad <matan@nvidia.com>; Alex
> Vesker <valex@nvidia.com>; Suanming Mou <suanmingm@nvidia.com>; Slava
> Ovsiienko <viacheslavo@nvidia.com>; Erez Shitrit <erezsh@nvidia.com>
> Subject: [PATCH] net/mlx5/hws: fix integrity bits level
> 
> The level field in the integrity item is not taken into account in the current
> implementation of hardware steering.
> Use this value instead of trying to find out the encapsulation level according to
> the protocol items involved.
> 
> Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
> 
> Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh