From: "Wang, Haiyue" <haiyue.wang@intel.com>
To: "谢华伟(此时此刻)" <huawei.xhw@alibaba-inc.com>,
"david.marchand@redhat.com" <david.marchand@redhat.com>,
"maxime.coquelin@redhat.com" <maxime.coquelin@redhat.com>,
"Yigit, Ferruh" <ferruh.yigit@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
"Burakov, Anatoly" <anatoly.burakov@intel.com>,
"xuemingl@nvidia.com" <xuemingl@nvidia.com>,
"grive@u256.net" <grive@u256.net>
Subject: Re: [dpdk-dev] [PATCH v11 2/2] bus/pci: support MMIO in PCI ioport accessors
Date: Thu, 11 Mar 2021 06:42:04 +0000 [thread overview]
Message-ID: <BN8PR11MB379559171764FF615E06D4FBF7909@BN8PR11MB3795.namprd11.prod.outlook.com> (raw)
In-Reply-To: <1615397790-16169-3-git-send-email-huawei.xhw@alibaba-inc.com>
Hi Huawei,
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of ???(????)
> Sent: Thursday, March 11, 2021 01:37
> To: david.marchand@redhat.com; maxime.coquelin@redhat.com; Yigit, Ferruh <ferruh.yigit@intel.com>
> Cc: dev@dpdk.org; Burakov, Anatoly <anatoly.burakov@intel.com>; xuemingl@nvidia.com; grive@u256.net;
> 谢华伟(此时此刻) <huawei.xhw@alibaba-inc.com>
> Subject: [dpdk-dev] [PATCH v11 2/2] bus/pci: support MMIO in PCI ioport accessors
>
> With I/O BAR, we get PIO(port-mapped I/O) address.
> With MMIO(memory-mapped I/O) BAR, we get mapped virtual address.
> We distinguish PIO and MMIO by their address range like how kernel does,
> i.e, address below 64K is PIO.
> ioread/write8/16/32 is provided to access PIO/MMIO.
> By the way, for virtio on arch other than x86, BAR flag indicates PIO
> but is mapped.
>
> Signed-off-by: huawei xie <huawei.xhw@alibaba-inc.com>
> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
> ---
> drivers/bus/pci/linux/pci.c | 4 --
> drivers/bus/pci/linux/pci_uio.c | 156 +++++++++++++++++++++++++++++-----------
> 2 files changed, 113 insertions(+), 47 deletions(-)
>
>
> +#if defined(RTE_ARCH_X86)
> +static inline uint8_t ioread8(void *addr)
> +{
> + uint8_t val;
> +
> + val = (uint64_t)(uintptr_t)addr >= PIO_MAX ?
> + *(volatile uint8_t *)addr :
> + inb_p((unsigned long)addr);
> +
> + return val;
> +}
> +
> +static inline uint16_t ioread16(void *addr)
> +{
> + uint16_t val;
> +
> + val = (uint64_t)(uintptr_t)addr >= PIO_MAX ?
> + *(volatile uint16_t *)addr :
> + inw_p((unsigned long)addr);
> +
> + return val;
> +}
> +
> +static inline uint32_t ioread32(void *addr)
> +{
> + uint32_t val;
> +
> + val = (uint64_t)(uintptr_t)addr >= PIO_MAX ?
> + *(volatile uint32_t *)addr :
> + inl_p((unsigned long)addr);
> +
> + return val;
> +}
> +
> +static inline void iowrite8(uint8_t val, void *addr)
> +{
> + (uint64_t)(uintptr_t)addr >= PIO_MAX ?
> + *(volatile uint8_t *)addr = val :
> + outb_p(val, (unsigned long)addr);
> +}
> +
> +static inline void iowrite16(uint16_t val, void *addr)
> +{
> + (uint64_t)(uintptr_t)addr >= PIO_MAX ?
> + *(volatile uint16_t *)addr = val :
> + outw_p(val, (unsigned long)addr);
> +}
> +
> +static inline void iowrite32(uint32_t val, void *addr)
> +{
> + (uint64_t)(uintptr_t)addr >= PIO_MAX ?
> + *(volatile uint32_t *)addr = val :
> + outl_p(val, (unsigned long)addr);
> +}
> +#else
> +static inline uint8_t ioread8(void *addr)
> +{
> + return *(volatile uint8_t *)addr;
> +}
> +
> +static inline uint16_t ioread16(void *addr)
> +{
> + return *(volatile uint16_t *)addr;
> +}
> +
> +static inline uint32_t ioread32(void *addr)
> +{
> + return *(volatile uint32_t *)addr;
> +}
> +
> +static inline void iowrite8(uint8_t val, void *addr)
> +{
> + *(volatile uint8_t *)addr = val;
> +}
> +
> +static inline void iowrite16(uint16_t val, void *addr)
> +{
> + *(volatile uint16_t *)addr = val;
> +}
> +
> +static inline void iowrite32(uint32_t val, void *addr)
> +{
> + *(volatile uint32_t *)addr = val;
> +}
> +#endif
> +
Like kernel use macro to do pio and mmio, maybe we can also to do so for
making code clean:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/lib/iomap.c
#define IO_COND(addr, is_pio, is_mmio) do { \
unsigned long port = (unsigned long __force)addr; \
if (port >= PIO_RESERVED) { \
is_mmio; \
} else if (port > PIO_OFFSET) { \
port &= PIO_MASK; \
is_pio; \
} else \
bad_io_access(port, #is_pio ); \
} while (0)
Like:
#if defined(RTE_ARCH_X86)
#define IO_COND(addr, is_pio, is_mmio) do { \
if ((uint64_t)(uintptr_t)addr >= PIO_MAX) { \
is_mmio; \
} else { \
is_pio; \
} \
} while (0)
#else
#define IO_COND(addr, is_pio, is_mmio) do { \
is_mmio; \
} while (0)
#endif
static inline uint8_t ioread8(void *addr)
{
uint8_t val;
IO_COND(addr,
val = inb_p((unsigned long)addr),
val = *(volatile uint8_t *)addr);
return val;
}
static inline uint16_t ioread16(void *addr)
{
uint16_t val;
IO_COND(addr,
val = inw_p((unsigned long)addr),
val = *(volatile uint16_t *)addr);
return val;
}
static inline uint32_t ioread32(void *addr)
{
uint32_t val;
IO_COND(addr,
val = inl_p((unsigned long)addr),
val = *(volatile uint32_t *)addr);
return val;
}
static inline void iowrite8(uint8_t val, void *addr)
{
IO_COND(addr,
outb_p(val, (unsigned long)addr),
*(volatile uint8_t *)addr = val);
}
static inline void iowrite16(uint16_t val, void *addr)
{
IO_COND(addr,
outw_p(val, (unsigned long)addr),
*(volatile uint16_t *)addr = val);
}
static inline void iowrite32(uint32_t val, void *addr)
{
IO_COND(addr,
outl_p(val, (unsigned long)addr),
*(volatile uint32_t *)addr = val);
}
> void
> pci_uio_ioport_read(struct rte_pci_ioport *p,
> void *data, size_t len, off_t offset)
> @@ -528,25 +622,13 @@
> for (d = data; len > 0; d += size, reg += size, len -= size) {
> if (len >= 4) {
> size = 4;
> -#if defined(RTE_ARCH_X86)
> - *(uint32_t *)d = inl(reg);
> -#else
> - *(uint32_t *)d = *(volatile uint32_t *)reg;
> -#endif
> + *(uint32_t *)d = ioread32((void *)reg);
> } else if (len >= 2) {
> size = 2;
> -#if defined(RTE_ARCH_X86)
> - *(uint16_t *)d = inw(reg);
> -#else
> - *(uint16_t *)d = *(volatile uint16_t *)reg;
> -#endif
> + *(uint16_t *)d = ioread16((void *)reg);
> } else {
> size = 1;
> -#if defined(RTE_ARCH_X86)
> - *d = inb(reg);
> -#else
> - *d = *(volatile uint8_t *)reg;
> -#endif
> + *d = ioread8((void *)reg);
> }
> }
> }
> @@ -562,25 +644,13 @@
> for (s = data; len > 0; s += size, reg += size, len -= size) {
> if (len >= 4) {
> size = 4;
> -#if defined(RTE_ARCH_X86)
> - outl_p(*(const uint32_t *)s, reg);
> -#else
> - *(volatile uint32_t *)reg = *(const uint32_t *)s;
> -#endif
> + iowrite32(*(const uint32_t *)s, (void *)reg);
> } else if (len >= 2) {
> size = 2;
> -#if defined(RTE_ARCH_X86)
> - outw_p(*(const uint16_t *)s, reg);
> -#else
> - *(volatile uint16_t *)reg = *(const uint16_t *)s;
> -#endif
> + iowrite16(*(const uint16_t *)s, (void *)reg);
> } else {
> size = 1;
> -#if defined(RTE_ARCH_X86)
> - outb_p(*s, reg);
> -#else
> - *(volatile uint8_t *)reg = *s;
> -#endif
> + iowrite8(*s, (void *)reg);
> }
> }
> }
> --
> 1.8.3.1
next prev parent reply other threads:[~2021-03-11 6:43 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-29 3:18 [dpdk-dev] [PATCH v6 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD 谢华伟(此时此刻)
2021-01-29 3:18 ` [dpdk-dev] [PATCH v6 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-02-03 9:37 ` Maxime Coquelin
2021-02-18 9:33 ` David Marchand
2021-02-21 15:58 ` 谢华伟(此时此刻)
2021-02-24 12:49 ` David Marchand
2021-02-24 15:29 ` 谢华伟(此时此刻)
2021-02-24 17:52 ` David Marchand
2021-03-01 15:47 ` 谢华伟(此时此刻)
2021-03-02 12:31 ` 谢华伟(此时此刻)
2021-01-29 3:18 ` [dpdk-dev] [PATCH v6 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-02-03 9:37 ` Maxime Coquelin
2021-02-09 14:51 ` Ferruh Yigit
2021-02-19 8:52 ` Ferruh Yigit
2021-02-21 15:45 ` 谢华伟(此时此刻)
2021-02-17 9:06 ` David Marchand
2021-02-17 14:15 ` 谢华伟(此时此刻)
2021-02-18 9:33 ` David Marchand
2021-01-29 3:25 ` [dpdk-dev] [PATCH v6 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD 谢华伟(此时此刻)
2021-02-01 7:43 ` 谢华伟(此时此刻)
2021-02-03 9:37 ` Maxime Coquelin
2021-02-04 2:50 ` 谢华伟(此时此刻)
2021-02-22 17:15 ` [dpdk-dev] [PATCH v7 " 谢华伟(此时此刻)
2021-02-22 17:15 ` [dpdk-dev] [PATCH v7 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-02-22 17:15 ` [dpdk-dev] [PATCH v7 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-02-22 17:25 ` Ferruh Yigit
2021-02-23 14:20 ` 谢华伟(此时此刻)
2021-02-24 15:45 ` Ferruh Yigit
2021-02-25 3:59 ` 谢华伟(此时此刻)
2021-02-25 9:52 ` David Marchand
2021-03-01 15:43 ` 谢华伟(此时此刻)
2021-03-02 13:14 ` David Marchand
2021-03-03 7:56 ` 谢华伟(此时此刻)
2021-03-01 16:01 ` [dpdk-dev] [PATCH v8 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD 谢华伟(此时此刻)
2021-03-01 16:01 ` [dpdk-dev] [PATCH v8 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-03-01 16:01 ` [dpdk-dev] [PATCH v8 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-03-02 12:48 ` [dpdk-dev] [PATCH v8 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD 谢华伟(此时此刻)
2021-03-02 13:01 ` Ferruh Yigit
2021-03-02 13:17 ` David Marchand
2021-03-03 17:46 ` [dpdk-dev] [PATCH v9 " 谢华伟(此时此刻)
2021-03-03 17:46 ` [dpdk-dev] [PATCH v9 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-03-03 17:46 ` [dpdk-dev] [PATCH v9 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-03-03 18:24 ` [dpdk-dev] [PATCH v9 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD Stephen Hemminger
2021-03-04 13:45 ` 谢华伟(此时此刻)
2021-03-03 18:47 ` [dpdk-dev] [PATCH v10 0/2] support both PIO and MMIO BAR for legacy virito device 谢华伟(此时此刻)
2021-03-03 18:47 ` [dpdk-dev] [PATCH v10 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-03-05 16:17 ` 谢华伟(此时此刻)
2021-03-09 6:22 ` 谢华伟(此时此刻)
2021-03-09 7:44 ` David Marchand
2021-03-03 18:47 ` [dpdk-dev] [PATCH v10 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-03-10 17:36 ` [dpdk-dev] [PATCH v11 0/2] support both PIO and MMIO BAR for legacy virito device 谢华伟(此时此刻)
2021-03-10 17:36 ` [dpdk-dev] [PATCH v11 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-03-10 17:36 ` [dpdk-dev] [PATCH v11 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-03-11 6:42 ` Wang, Haiyue [this message]
2021-03-15 10:19 ` David Marchand
2021-03-15 11:25 ` 谢华伟(此时此刻)
2021-03-15 13:11 ` Wang, Haiyue
2021-03-11 11:54 ` [dpdk-dev] [PATCH v11 0/2] support both PIO and MMIO BAR for legacy virito device Wang, Yinan
2021-03-12 14:32 ` David Marchand
2021-03-15 14:16 ` David Marchand
2021-03-17 8:12 ` 谢华伟(此时此刻)
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