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* [PATCH v1] crypto/qat: fix null hash algorithm digest size
@ 2022-10-27 10:50 Brian Dooley
  2022-10-27 13:10 ` Power, Ciara
  0 siblings, 1 reply; 3+ messages in thread
From: Brian Dooley @ 2022-10-27 10:50 UTC (permalink / raw)
  To: Kai Ji
  Cc: dev, stable, gakhil, arkadiuszx.kusztal, Brian Dooley, declan.doherty

Add check for null hash algorithm digest size. Digest size should be 4B
or request will be rejected.

Fixes: 1703e94ac5ce ("qat: add driver for QuickAssist devices")
Cc: declan.doherty@intel.com
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
---
 drivers/crypto/qat/qat_sym_session.c | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c
index d96122b208..ff4b537706 100644
--- a/drivers/crypto/qat/qat_sym_session.c
+++ b/drivers/crypto/qat/qat_sym_session.c
@@ -2040,7 +2040,12 @@ int qat_sym_cd_auth_set(struct qat_sym_session *cdesc,
 	hash_offset = cdesc->cd_cur_ptr-((uint8_t *)&cdesc->cd);
 	hash = (struct icp_qat_hw_auth_setup *)cdesc->cd_cur_ptr;
 	hash->auth_config.reserved = 0;
-	hash->auth_config.config =
+	if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_NULL)
+		hash->auth_config.config =
+			ICP_QAT_HW_AUTH_CONFIG_BUILD(cdesc->auth_mode,
+				cdesc->qat_hash_alg, 4);
+	else
+		hash->auth_config.config =
 			ICP_QAT_HW_AUTH_CONFIG_BUILD(cdesc->auth_mode,
 				cdesc->qat_hash_alg, digestsize);
 
@@ -2408,10 +2413,16 @@ int qat_sym_cd_auth_set(struct qat_sym_session *cdesc,
 	/* Auth CD config setup */
 	hash_cd_ctrl->hash_cfg_offset = hash_offset >> 3;
 	hash_cd_ctrl->hash_flags = ICP_QAT_FW_AUTH_HDR_FLAG_NO_NESTED;
-	hash_cd_ctrl->inner_res_sz = digestsize;
-	hash_cd_ctrl->final_sz = digestsize;
 	hash_cd_ctrl->inner_state1_sz = state1_size;
-	auth_param->auth_res_sz = digestsize;
+	if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_NULL) {
+		hash_cd_ctrl->inner_res_sz = 4;
+		hash_cd_ctrl->final_sz = 4;
+		auth_param->auth_res_sz = 4;
+	} else {
+		hash_cd_ctrl->inner_res_sz = digestsize;
+		hash_cd_ctrl->final_sz = digestsize;
+		auth_param->auth_res_sz = digestsize;
+	}
 
 	hash_cd_ctrl->inner_state2_sz  = state2_size;
 	hash_cd_ctrl->inner_state2_offset = hash_cd_ctrl->hash_cfg_offset +
-- 
2.25.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

* RE: [PATCH v1] crypto/qat: fix null hash algorithm digest size
  2022-10-27 10:50 [PATCH v1] crypto/qat: fix null hash algorithm digest size Brian Dooley
@ 2022-10-27 13:10 ` Power, Ciara
  2022-10-27 14:12   ` Akhil Goyal
  0 siblings, 1 reply; 3+ messages in thread
From: Power, Ciara @ 2022-10-27 13:10 UTC (permalink / raw)
  To: Dooley, Brian, Ji, Kai
  Cc: dev, stable, gakhil, Kusztal, ArkadiuszX, Dooley, Brian, Doherty, Declan



> -----Original Message-----
> From: Brian Dooley <brian.dooley@intel.com>
> Sent: Thursday 27 October 2022 11:50
> To: Ji, Kai <kai.ji@intel.com>
> Cc: dev@dpdk.org; stable@dpdk.org; gakhil@marvell.com; Kusztal,
> ArkadiuszX <arkadiuszx.kusztal@intel.com>; Dooley, Brian
> <brian.dooley@intel.com>; Doherty, Declan <declan.doherty@intel.com>
> Subject: [PATCH v1] crypto/qat: fix null hash algorithm digest size
> 
> Add check for null hash algorithm digest size. Digest size should be 4B or
> request will be rejected.
> 
> Fixes: 1703e94ac5ce ("qat: add driver for QuickAssist devices")
> Cc: declan.doherty@intel.com
> Cc: stable@dpdk.org
> Signed-off-by: Brian Dooley <brian.dooley@intel.com>
> ---

Acked-by: Ciara Power <ciara.power@intel.com>

^ permalink raw reply	[flat|nested] 3+ messages in thread

* RE: [PATCH v1] crypto/qat: fix null hash algorithm digest size
  2022-10-27 13:10 ` Power, Ciara
@ 2022-10-27 14:12   ` Akhil Goyal
  0 siblings, 0 replies; 3+ messages in thread
From: Akhil Goyal @ 2022-10-27 14:12 UTC (permalink / raw)
  To: Power, Ciara, Dooley, Brian, Ji, Kai
  Cc: dev, stable, Kusztal, ArkadiuszX, Dooley, Brian, Doherty, Declan

> > Add check for null hash algorithm digest size. Digest size should be 4B or
> > request will be rejected.
> >
> > Fixes: 1703e94ac5ce ("qat: add driver for QuickAssist devices")
> > Cc: declan.doherty@intel.com
> > Cc: stable@dpdk.org
> > Signed-off-by: Brian Dooley <brian.dooley@intel.com>
> > ---
> 
> Acked-by: Ciara Power <ciara.power@intel.com>
Applied to dpdk-next-crypto

Thanks.

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2022-10-27 14:12 UTC | newest]

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2022-10-27 10:50 [PATCH v1] crypto/qat: fix null hash algorithm digest size Brian Dooley
2022-10-27 13:10 ` Power, Ciara
2022-10-27 14:12   ` Akhil Goyal

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