DPDK patches and discussions
 help / color / mirror / Atom feed
* [PATCH] net/mlx5/hws: enable multiple integrity items
@ 2024-02-28  9:50 Michael Baum
  2024-02-28 13:53 ` Raslan Darawsheh
  0 siblings, 1 reply; 2+ messages in thread
From: Michael Baum @ 2024-02-28  9:50 UTC (permalink / raw)
  To: dev
  Cc: Matan Azrad, Dariusz Sosnowski, Raslan Darawsheh,
	Viacheslav Ovsiienko, Ori Kam, Suanming Mou, valex, stable,
	Erez Shitrit

The integrity item uses the DW "oks1" in header layout. It includes the
all supported bits for both inner and outer. When item is integrity
type, the relevant bits are turned on and all DW is submitted.

When user provides more then single integrity item in same pattern, the
last one overrides the values were submitted before. This is problematic
when user wants to match integrity bits for both inner and outer in same
pattern, he cannot merge them into single item since rte_flow API
provides encapsulation level field to match either inner or outer.

This patch avoids the overriding values, when "oks1" is submitted,
operator "or" is used instead of regular set.

Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
Cc: valex@nvidia.com
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_definer.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index e036aca781..0e15aafb8a 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -44,6 +44,10 @@
 				  (bit_off))); \
 	} while (0)
 
+/* Getter function based on bit offset and mask, for 32bit DW*/
+#define DR_GET_32(p, byte_off, bit_off, mask) \
+	((rte_be_to_cpu_32(*((const rte_be32_t *)(p) + ((byte_off) / 4))) >> (bit_off)) & (mask))
+
 /* Setter function based on bit offset and mask */
 #define DR_SET(p, v, byte_off, bit_off, mask) \
 	do { \
@@ -509,7 +513,7 @@ mlx5dr_definer_integrity_set(struct mlx5dr_definer_fc *fc,
 {
 	bool inner = (fc->fname == MLX5DR_DEFINER_FNAME_INTEGRITY_I);
 	const struct rte_flow_item_integrity *v = item_spec;
-	uint32_t ok1_bits = 0;
+	uint32_t ok1_bits = DR_GET_32(tag, fc->byte_off, fc->bit_off, fc->bit_mask);
 
 	if (v->l3_ok)
 		ok1_bits |= inner ? BIT(MLX5DR_DEFINER_OKS1_SECOND_L3_OK) :
-- 
2.25.1


^ permalink raw reply	[flat|nested] 2+ messages in thread

* RE: [PATCH] net/mlx5/hws: enable multiple integrity items
  2024-02-28  9:50 [PATCH] net/mlx5/hws: enable multiple integrity items Michael Baum
@ 2024-02-28 13:53 ` Raslan Darawsheh
  0 siblings, 0 replies; 2+ messages in thread
From: Raslan Darawsheh @ 2024-02-28 13:53 UTC (permalink / raw)
  To: Michael Baum, dev
  Cc: Matan Azrad, Dariusz Sosnowski, Slava Ovsiienko, Ori Kam,
	Suanming Mou, Alex Vesker, stable, Erez Shitrit

Hi,

> -----Original Message-----
> From: Michael Baum <michaelba@nvidia.com>
> Sent: Wednesday, February 28, 2024 11:51 AM
> To: dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Dariusz Sosnowski
> <dsosnowski@nvidia.com>; Raslan Darawsheh <rasland@nvidia.com>; Slava
> Ovsiienko <viacheslavo@nvidia.com>; Ori Kam <orika@nvidia.com>;
> Suanming Mou <suanmingm@nvidia.com>; Alex Vesker <valex@nvidia.com>;
> stable@dpdk.org; Erez Shitrit <erezsh@nvidia.com>
> Subject: [PATCH] net/mlx5/hws: enable multiple integrity items
> 
> The integrity item uses the DW "oks1" in header layout. It includes the all
> supported bits for both inner and outer. When item is integrity type, the
> relevant bits are turned on and all DW is submitted.
> 
> When user provides more then single integrity item in same pattern, the last
> one overrides the values were submitted before. This is problematic when user
> wants to match integrity bits for both inner and outer in same pattern, he
> cannot merge them into single item since rte_flow API provides encapsulation
> level field to match either inner or outer.
> 
> This patch avoids the overriding values, when "oks1" is submitted, operator
> "or" is used instead of regular set.
> 
> Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
> Cc: valex@nvidia.com
> Cc: stable@dpdk.org
> 
> Signed-off-by: Michael Baum <michaelba@nvidia.com>
> Reviewed-by: Erez Shitrit <erezsh@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>
Patch applied to next-net-mlx,

Kindest regards
Raslan Darawsheh

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2024-02-28 13:53 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-02-28  9:50 [PATCH] net/mlx5/hws: enable multiple integrity items Michael Baum
2024-02-28 13:53 ` Raslan Darawsheh

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).