NVIDIA roadmap for 23.03

NVIDIA roadmap for 23.03

[Lior Margalit]

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Please find below NVIDIA roadmap for 23.03 release:


A. rte_flow new APIs

=================

[1] Support match on ICMPv6 ID and sequence​

http://patches.dpdk.org/project/dpdk/cover/20221220074403.1015411-1-yongquanx@nvidia.com/<https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatches.dpdk.org%2Fproject%2Fdpdk%2Fcover%2F20221220074403.1015411-1-yongquanx%40nvidia.com%2F&data=05%7C01%7Clmargalit%40nvidia.com%7Ccae3c0517aab44ff1eff08daed9f9481%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638083566891787420%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=UA%2FnSYhayX9RJUVbamMKaHQ2sjKgyBJdaA3L4k72Olg%3D&reserved=0>

Add new pattern item types for ICMPv6 echo request and reply.



[2] Support match on port affinity and set affinity in Tx queue​

http://patches.dpdk.org/project/dpdk/cover/20221221102934.13822-1-jiaweiw@nvidia.com/<https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatches.dpdk.org%2Fproject%2Fdpdk%2Fcover%2F20221221102934.13822-1-jiaweiw%40nvidia.com%2F&data=05%7C01%7Clmargalit%40nvidia.com%7Ccae3c0517aab44ff1eff08daed9f9481%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638083566891787420%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=%2Fwkk4A5JmnLejtgBImLOjQsBkn%2FR9THmTncP32DAIPs%3D&reserved=0>

Value: expose indication in DPDK level to which physical port the packet belongs to. Example of usage: when dual ports configured as a bond in Linux, the app can get the ingress port of a packet, and send the ACK out on the same port.

Add new pattern item type for port affinity. Its value reflects the physical port affinity of the received packets. ​

Add tx_affinity setting in Tx queue, the affinity value reflects the physical port the packets will be sent to.



[3] Support specifying the direction info when creating the transfer table.

http://patches.dpdk.org/project/dpdk/patch/20221114115946.1074787-1-rongweil@nvidia.com/<https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatches.dpdk.org%2Fproject%2Fdpdk%2Fpatch%2F20221114115946.1074787-1-rongweil%40nvidia.com%2F&data=05%7C01%7Clmargalit%40nvidia.com%7Ccae3c0517aab44ff1eff08daed9f9481%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638083566891787420%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=vb3C78CHi658fjZewTdy9lTh0nBMc2OvqzMeUCXLxOU%3D&reserved=0>

Value: enable memory footprint reduction when creating the HW table entries.

Add an option to define the direction (traffic originates from uplink/vport/both) when creating the HW table.



[4] Support match on IPv6 routing extension

http://patches.dpdk.org/project/dpdk/patch/20221221084304.3680690-2-rongweil@nvidia.com/<https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatches.dpdk.org%2Fproject%2Fdpdk%2Fpatch%2F20221221084304.3680690-2-rongweil%40nvidia.com%2F&data=05%7C01%7Clmargalit%40nvidia.com%7Ccae3c0517aab44ff1eff08daed9f9481%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638083566891787420%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=21UCpnCZ0P%2Bg2jFB0VRTXUZz2Aa1KwkbJ0XxwwYk%2FBw%3D&reserved=0>

Add new pattern types to match on the presence of IPv6 routing extension header, extension header type, next header and valid segments number.



[5] Support setting process as active or standby

http://patches.dpdk.org/project/dpdk/cover/20221221090017.3715030-1-rongweil@nvidia.com/<https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatches.dpdk.org%2Fproject%2Fdpdk%2Fcover%2F20221221090017.3715030-1-rongweil%40nvidia.com%2F&data=05%7C01%7Clmargalit%40nvidia.com%7Ccae3c0517aab44ff1eff08daed9f9481%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638083566891787420%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=rz%2FpfGxqvs4I5%2BCL%2BoAl3oaUSsm6Sxf2omXEQXEo9lc%3D&reserved=0>

Value: allow an application to program rules in the HW, but activate them in later time.

Example of usage: enable hot upgrade of the application with minimal downtime.​

The “active” role means rules are programmed to HW immediately, it is the default state.

The “standby” role means rules are queued in the HW. When activating the process, the rules become effective immediately.

In Nvidia (mlx5) PMD it is done by toggling the priority of the rules in group 0, because this is the root group that is shared by all the applications.



[6] Support Flex item modify field

http://patches.dpdk.org/project/dpdk/cover/20221221084000.3680015-1-rongweil@nvidia.com/<https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatches.dpdk.org%2Fproject%2Fdpdk%2Fcover%2F20221221084000.3680015-1-rongweil%40nvidia.com%2F&data=05%7C01%7Clmargalit%40nvidia.com%7Ccae3c0517aab44ff1eff08daed9f9481%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638083566891787420%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=GRnJUjhZHRZ56dXy3fl0v7CZwPAer%2FEGB%2BirNTUci3Y%3D&reserved=0>

Flow flex item provides the capability to introduce an arbitrary user-specified network protocol header.

There is already API to perform match on this header with desired patterns and masks, and in this release flex item modify field action is added.​



[7] Support sharing indirect actions between ports

https://patches.dpdk.org/project/dpdk/patch/20221228165433.18185-1-viacheslavo@nvidia.com/<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatches.dpdk.org%2Fproject%2Fdpdk%2Fpatch%2F20221228165433.18185-1-viacheslavo%40nvidia.com%2F&data=05%7C01%7Clmargalit%40nvidia.com%7Ccae3c0517aab44ff1eff08daed9f9481%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638083566891787420%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=41hA8b%2BuDXH1kmgbD%2FXkVCGM22hSamF4AzLSHw04ryk%3D&reserved=0>

The goal is to manage packets belonging to the same logical connection that may come and go through different ports.

Example of use may be with Connection Tracking object that needs to be updated from two different ports; Or - a Quota item (see #A.9) in which the application logic needs to monitor a volume quota that counts both uplink and downlink traffic. This capability is supported for ports that reside in the same physical NIC.

 

[8] Support template table insertion and matching types

https://patches.dpdk.org/project/dpdk/patch/20221214022110.393410-1-akozyrev@nvidia.com/<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatches.dpdk.org%2Fproject%2Fdpdk%2Fpatch%2F20221214022110.393410-1-akozyrev%40nvidia.com%2F&data=05%7C01%7Clmargalit%40nvidia.com%7Ccae3c0517aab44ff1eff08daed9f9481%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638083566891787420%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=1tz5IPV9iIpJ3zPkKisPsTghFONv6z%2FY1Jki%2FbIONPw%3D&reserved=0>

The goal in index-based insertion is providing flexibility in pipeline orchestration and performance improvement, by avoiding additional matches and simply execute predefined actions after jumping to the rule index.​

Allow a user to specify the insertion type used in template tables.

Flow rules can be inserted by calculating the hash value for the pattern or inserted by index. ​

Allow a user to specify the hash calculation function used in template tables (linear, CRC32 and CRC16).​

The custom hash result can be retrieved via new modify_field id: RTE_FLOW_FIELD_HASH_RESULT



[9] Support Quota flow action and item

https://patches.dpdk.org/project/dpdk/patch/20221221073547.988-2-getelson@nvidia.com/<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatches.dpdk.org%2Fproject%2Fdpdk%2Fpatch%2F20221221073547.988-2-getelson%40nvidia.com%2F&data=05%7C01%7Clmargalit%40nvidia.com%7Ccae3c0517aab44ff1eff08daed9f9481%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638083566891787420%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=ZFH3YOAEyhNSnRxuCFZIrvpKwkAQJ320yXYHjlxMi7k%3D&reserved=0>

Value: allow setting a flow or multiple flows to share a volume quota in which traffic usage can be monitored by the application to assure usage is permitted up to a predefined limit

The Quota action limits traffic according to pre-defined configuration.​

The quota action updates the ‘quota’ value and sets packet quota state (PASS or BLOCK).​

The quota item matches on the flow quota state. ​



[10] Support LZ4 decompress algorithm in rte_comp

https://patchwork.dpdk.org/project/dpdk/patch/20220410182622.8828-1-rzidane@nvidia.com/<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.dpdk.org%2Fproject%2Fdpdk%2Fpatch%2F20220410182622.8828-1-rzidane%40nvidia.com%2F&data=05%7C01%7Clmargalit%40nvidia.com%7Ccae3c0517aab44ff1eff08daed9f9481%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638083566891787420%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=f8O%2FZOkMI0UkBroGXKsN2gqzp2GYBIhvi7JHdrXlqr0%3D&reserved=0>

lz4 is an extremely fast lossless compression algorithm, based on byte-aligned LZ77 family of compression scheme.

BlueField-3 Data Processing Unit (DPU) supports decompression for lz4 blocks.

More info is here: https://github.com/lz4/lz4



B. Net/mlx5 PMD updates

=====================

[1] Support match on ESP header and SPI field in ESP header for IPSec tunnels.



[2] Support enhanced CQE compression​

Value: reduce PCI overhead on CQE writes to improve performance.

Extend rxq_cqe_comp_en devarg to support enhanced mode for the different layout.



[4] Support Flex item match and modify field through the async API



[3] Support BlueField-3 Data Processing Unit (DPU)



C. Test apps updates

=================

[1] Support the changes in rte_flow listed above in testpmd.



[2] Added algo option in test-compress-perf so the user can choose between null(DMA), deflate, lzs or lz4 (default: deflate)


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