Re: [dts] [PATCH V1] framework/dut.py:correct the code defect.

["Mei, JianweiX" <jianweix.mei@intel.com>]

Hi Lijuan,
Please ignore this patch, because there is a patch v2 submitted. 

-----Original Message-----
From: Mei, JianweiX 
Sent: Tuesday, November 5, 2019 4:12 PM
To: dts@dpdk.org
Cc: Mei, JianweiX <jianweix.mei@intel.com>
Subject: [dts][PATCH V1] framework/dut.py:correct the code defect.

code logic error and modify it.

Signed-off-by: Jianwei Mei <jianweix.mei@intel.com>
---
 framework/dut.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/framework/dut.py b/framework/dut.py index 54ff28b..99a02d5 100644
--- a/framework/dut.py
+++ b/framework/dut.py
@@ -144,7 +144,7 @@ class Dut(Crb):
                             port_option = config['port_options'][port]
                             w_pci_list.append('-w %s,%s' % (self.ports_info[config['ports'].index(port)]['pci'], port_option))
                         else:
-                            w_pci_list = ['-w %s' % pci for pci in config['ports']]
+                            w_pci_list.append('-w %s' % 
+ self.ports_info[config['ports'].index(port)]['pci'])
             w_pci_str = ' '.join(w_pci_list)
 
             # deal with black ports
--
1.8.3.1