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From: "Mei, JianweiX" <jianweix.mei@intel.com>
To: "Tu, Lijuan" <lijuan.tu@intel.com>, "dts@dpdk.org" <dts@dpdk.org>
Subject: Re: [dts] [PATCH V1] framework/dut.py:correct the code defect.
Date: Tue, 5 Nov 2019 09:30:02 +0000
Message-ID: <8492B1A1F60DBB41A65FD160BBB3DA8BFE0303@SHSMSX103.ccr.corp.intel.com> (raw)
In-Reply-To: <1572941497-255844-1-git-send-email-jianweix.mei@intel.com>

Hi Lijuan,
Please ignore this patch, because there is a patch v2 submitted. 

-----Original Message-----
From: Mei, JianweiX 
Sent: Tuesday, November 5, 2019 4:12 PM
To: dts@dpdk.org
Cc: Mei, JianweiX <jianweix.mei@intel.com>
Subject: [dts][PATCH V1] framework/dut.py:correct the code defect.

code logic error and modify it.

Signed-off-by: Jianwei Mei <jianweix.mei@intel.com>
---
 framework/dut.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/framework/dut.py b/framework/dut.py index 54ff28b..99a02d5 100644
--- a/framework/dut.py
+++ b/framework/dut.py
@@ -144,7 +144,7 @@ class Dut(Crb):
                             port_option = config['port_options'][port]
                             w_pci_list.append('-w %s,%s' % (self.ports_info[config['ports'].index(port)]['pci'], port_option))
                         else:
-                            w_pci_list = ['-w %s' % pci for pci in config['ports']]
+                            w_pci_list.append('-w %s' % 
+ self.ports_info[config['ports'].index(port)]['pci'])
             w_pci_str = ' '.join(w_pci_list)
 
             # deal with black ports
--
1.8.3.1


      reply index

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-05  8:11 Jianwei Mei
2019-11-05  9:30 ` Mei, JianweiX [this message]

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