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* [dpdk-stable] [PATCH 4/5] crypto/mlx5: fix size of UMR WQE
       [not found] <20211012155359.8908-1-talshn@nvidia.com>
@ 2021-10-12 15:53 ` Tal Shnaiderman
  0 siblings, 0 replies; only message in thread
From: Tal Shnaiderman @ 2021-10-12 15:53 UTC (permalink / raw)
  To: dev
  Cc: thomas, matan, rasland, asafp, gakhil, declan.doherty,
	viacheslavo, eilong, stable

The size of the UMR WQE allocated object is decided by a sizof
operation on the struct, however since the struct contains
a union of flexible array members this sizeof results can differ
between compilers.

GCC for example treats the union as 0 sized, MSVC adds a padding
of 16Bits.

To resolve the ambiguity the allocation size will be calculated
by the sizes of the members excluding the flexible union.

Fixes: a1978aa23bf4 ("crypto/mlx5: add maximum segments configuration")
Cc: stable@dpdk.org

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/crypto/mlx5/mlx5_crypto.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c
index 11cbc78586..7192fa661e 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.c
+++ b/drivers/crypto/mlx5/mlx5_crypto.c
@@ -959,7 +959,9 @@ mlx5_crypto_dev_probe(struct mlx5_common_device *cdev)
 	priv->keytag = rte_cpu_to_be_64(devarg_prms.keytag);
 	priv->max_segs_num = devarg_prms.max_segs_num;
 	priv->umr_wqe_size = sizeof(struct mlx5_wqe_umr_bsf_seg) +
-			     sizeof(struct mlx5_umr_wqe) +
+			     sizeof(struct mlx5_wqe_cseg) +
+			     sizeof(struct mlx5_wqe_umr_cseg) +
+			     sizeof(struct mlx5_wqe_mkey_cseg) +
 			     RTE_ALIGN(priv->max_segs_num, 4) *
 			     sizeof(struct mlx5_wqe_dseg);
 	rdmw_wqe_size = sizeof(struct mlx5_rdma_write_wqe) +
-- 
2.16.1.windows.4


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2021-10-12 15:53 ` [dpdk-stable] [PATCH 4/5] crypto/mlx5: fix size of UMR WQE Tal Shnaiderman

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