From: <psatheesh@marvell.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>
Cc: <dev@dpdk.org>, Satheesh Paul <psatheesh@marvell.com>, <stable@dpdk.org>
Subject: [dpdk-dev] [PATCH 1/2] common/cnxk: fix ROC naming convention issues
Date: Thu, 17 Mar 2022 09:20:35 +0530 [thread overview]
Message-ID: <20220317035036.2290272-1-psatheesh@marvell.com> (raw)
From: Satheesh Paul <psatheesh@marvell.com>
Fixed some names to follow ROC naming convention in ROC NPC code.
Fixes: 4edf1246a40 ("common/cnxk: support matching VLAN existence in RTE Flow")
Cc: stable@dpdk.org
Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
---
drivers/common/cnxk/roc_npc.h | 6 +++---
drivers/common/cnxk/roc_npc_mcam.c | 4 ++--
drivers/common/cnxk/roc_platform.h | 2 +-
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h
index 6204139396..4c0151e2e7 100644
--- a/drivers/common/cnxk/roc_npc.h
+++ b/drivers/common/cnxk/roc_npc.h
@@ -60,7 +60,7 @@ struct roc_npc_flow_item_raw {
struct roc_ether_addr {
uint8_t addr_bytes[PLT_ETHER_ADDR_LEN]; /**< Addr bytes in tx order */
-} plt_aligned(2);
+} __plt_aligned(2);
struct roc_ether_hdr {
struct roc_ether_addr d_addr; /**< Destination address. */
@@ -72,7 +72,7 @@ struct roc_ether_hdr {
} S_un; /**< Do not use directly; use s_addr instead.*/
};
uint16_t ether_type; /**< Frame type. */
-} plt_aligned(2);
+} __plt_aligned(2);
PLT_STD_C11
struct roc_npc_flow_item_eth {
@@ -254,7 +254,7 @@ enum roc_npc_rss_hash_function {
struct roc_npc_action_rss {
enum roc_npc_rss_hash_function func;
uint32_t level;
- uint64_t types; /**< Specific RSS hash types (see RTE_ETH_RSS_*). */
+ uint64_t types; /**< Specific RSS hash types (see ETH_RSS_*). */
uint32_t key_len; /**< Hash key length in bytes. */
uint32_t queue_num; /**< Number of entries in @p queue. */
const uint8_t *key; /**< Hash key. */
diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c
index 9c5ff5e60a..e592310bde 100644
--- a/drivers/common/cnxk/roc_npc_mcam.c
+++ b/drivers/common/cnxk/roc_npc_mcam.c
@@ -283,8 +283,8 @@ npc_get_kex_capability(struct npc *npc)
/* Custom L3 frame: varied offset and lengths */
kex_cap.bit.custom_l3 =
npc_is_kex_enabled(npc, NPC_LID_LC, NPC_LT_LC_CUSTOM0, 0, 0);
- kex_cap.bit.custom_l3 |=
- npc_is_kex_enabled(npc, NPC_LID_LC, NPC_LT_LC_CUSTOM1, 0, 0);
+ kex_cap.bit.custom_l3 |= (uint64_t)npc_is_kex_enabled(
+ npc, NPC_LID_LC, NPC_LT_LC_CUSTOM1, 0, 0);
/* SCTP sport : offset 0B, len 2B */
kex_cap.bit.sctp_sport = npc_is_kex_enabled(
npc, NPC_LID_LD, NPC_LT_LD_SCTP, 0 * 8, 2 * 8);
diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h
index 28004b1743..dd6514eb10 100644
--- a/drivers/common/cnxk/roc_platform.h
+++ b/drivers/common/cnxk/roc_platform.h
@@ -98,7 +98,7 @@
#define plt_cpu_to_be_64 rte_cpu_to_be_64
#define plt_be_to_cpu_64 rte_be_to_cpu_64
-#define plt_aligned __rte_aligned
+#define __plt_aligned __rte_aligned
#define plt_align32pow2 rte_align32pow2
#define plt_align32prevpow2 rte_align32prevpow2
--
2.25.4
next reply other threads:[~2022-03-17 3:50 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-17 3:50 psatheesh [this message]
2022-03-17 3:50 ` [dpdk-dev] [PATCH 2/2] common/cnxk: fix QINQ ROC item mismatch issue psatheesh
2022-04-25 5:11 ` [dpdk-dev] [PATCH 1/2] common/cnxk: fix ROC naming convention issues Jerin Jacob
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