[PATCH v3 02/15] common/idpf/base: fix ctlq message send and receive

[PATCH v3 02/15] common/idpf/base: fix ctlq message send and receive

[Wenjing Qiao]

Fixes the ctlq send and receive functions to not cast the cookie field
to a u64 before programming. By doing a cast, it can cause endianness
issues as LE will swap the lower 32 and higher 32 bits whereas BE will
not. By treating this field as two 32 bit values, both BE and LE will
place the retval and opcode in the correct location.

Since this field is now being treated as two 32 bit values, the cfg.data
section must also be split into a data high and data low. Macros to
easily pack and read these fields have also been added.

Fixes: fb4ac04e9bfa ("common/idpf: introduce common library")
Cc: stable@dpdk.org

Signed-off-by: Charles Stoll <charles.stoll@intel.com>
Signed-off-by: Wenjing Qiao <wenjing.qiao@intel.com>
---
 drivers/common/idpf/base/idpf_controlq.c | 16 ++++------------
 1 file changed, 4 insertions(+), 12 deletions(-)

diff --git a/drivers/common/idpf/base/idpf_controlq.c b/drivers/common/idpf/base/idpf_controlq.c
index 3af81e5a64..8e4d3ee54f 100644
--- a/drivers/common/idpf/base/idpf_controlq.c
+++ b/drivers/common/idpf/base/idpf_controlq.c
@@ -311,18 +311,14 @@ int idpf_ctlq_send(struct idpf_hw *hw, struct idpf_ctlq_info *cq,
 
 	for (i = 0; i < num_q_msg; i++) {
 		struct idpf_ctlq_msg *msg = &q_msg[i];
-		u64 msg_cookie;
 
 		desc = IDPF_CTLQ_DESC(cq, cq->next_to_use);
 
 		desc->opcode = CPU_TO_LE16(msg->opcode);
 		desc->pfid_vfid = CPU_TO_LE16(msg->func_id);
 
-		msg_cookie = *(u64 *)&msg->cookie;
-		desc->cookie_high =
-			CPU_TO_LE32(IDPF_HI_DWORD(msg_cookie));
-		desc->cookie_low =
-			CPU_TO_LE32(IDPF_LO_DWORD(msg_cookie));
+		desc->cookie_high = CPU_TO_LE32(msg->cookie.mbx.chnl_opcode);
+		desc->cookie_low = CPU_TO_LE32(msg->cookie.mbx.chnl_retval);
 
 		desc->flags = CPU_TO_LE16((msg->host_id & IDPF_HOST_ID_MASK) <<
 					  IDPF_CTLQ_FLAG_HOST_ID_S);
@@ -620,8 +616,6 @@ int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg,
 	num_to_clean = *num_q_msg;
 
 	for (i = 0; i < num_to_clean; i++) {
-		u64 msg_cookie;
-
 		/* Fetch next descriptor and check if marked as done */
 		desc = IDPF_CTLQ_DESC(cq, ntc);
 		flags = LE16_TO_CPU(desc->flags);
@@ -639,10 +633,8 @@ int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg,
 		if (flags & IDPF_CTLQ_FLAG_ERR)
 			ret_code = -EBADMSG;
 
-		msg_cookie = (u64)LE32_TO_CPU(desc->cookie_high) << 32;
-		msg_cookie |= (u64)LE32_TO_CPU(desc->cookie_low);
-		idpf_memcpy(&q_msg[i].cookie, &msg_cookie, sizeof(u64),
-			    IDPF_NONDMA_TO_NONDMA);
+		q_msg[i].cookie.mbx.chnl_opcode = LE32_TO_CPU(desc->cookie_high);
+		q_msg[i].cookie.mbx.chnl_retval = LE32_TO_CPU(desc->cookie_low);
 
 		q_msg[i].opcode = LE16_TO_CPU(desc->opcode);
 		q_msg[i].data_len = LE16_TO_CPU(desc->datalen);
-- 
2.25.1

[PATCH v3 03/15] common/idpf/base: fix ITR register definitions for AVF

[Wenjing Qiao]

Fix ITR register definitions for AVF1.0 and AVF2.0

Fixes: fb4ac04e9bfa ("common/idpf: introduce common library")
Cc: stable@dpdk.org

Signed-off-by: Priyalee Kushwaha <priyalee.kushwaha@intel.com>
Signed-off-by: Wenjing Qiao <wenjing.qiao@intel.com>
---
 drivers/common/idpf/base/idpf_lan_pf_regs.h |  9 +++++++--
 drivers/common/idpf/base/idpf_lan_vf_regs.h | 17 ++++++++++++-----
 2 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/drivers/common/idpf/base/idpf_lan_pf_regs.h b/drivers/common/idpf/base/idpf_lan_pf_regs.h
index 3df2347bd7..7f731ec3d6 100644
--- a/drivers/common/idpf/base/idpf_lan_pf_regs.h
+++ b/drivers/common/idpf/base/idpf_lan_pf_regs.h
@@ -77,8 +77,13 @@
 #define PF_GLINT_DYN_CTL_WB_ON_ITR_M	BIT(PF_GLINT_DYN_CTL_WB_ON_ITR_S)
 #define PF_GLINT_DYN_CTL_INTENA_MSK_S	31
 #define PF_GLINT_DYN_CTL_INTENA_MSK_M	BIT(PF_GLINT_DYN_CTL_INTENA_MSK_S)
-#define PF_GLINT_ITR_V2(_i, _reg_start) (((_i) * 4) + (_reg_start))
-#define PF_GLINT_ITR(_i, _INT) (PF_GLINT_BASE + (((_i) + 1) * 4) + ((_INT) * 0x1000))
+/* _ITR is ITR index, _INT is interrupt index, _itrn_indx_spacing is
+ * spacing b/w itrn registers of the same vector.
+ */
+#define PF_GLINT_ITR_ADDR(_ITR, _reg_start, _itrn_indx_spacing) \
+		((_reg_start) + (((_ITR)) * (_itrn_indx_spacing)))
+/* For PF, itrn_indx_spacing is 4 and itrn_reg_spacing is 0x1000 */
+#define PF_GLINT_ITR(_ITR, _INT) (PF_GLINT_BASE + (((_ITR) + 1) * 4) + ((_INT) * 0x1000))
 #define PF_GLINT_ITR_MAX_INDEX		2
 #define PF_GLINT_ITR_INTERVAL_S		0
 #define PF_GLINT_ITR_INTERVAL_M		MAKEMASK(0xFFF, PF_GLINT_ITR_INTERVAL_S)
diff --git a/drivers/common/idpf/base/idpf_lan_vf_regs.h b/drivers/common/idpf/base/idpf_lan_vf_regs.h
index 9cd4f757d9..13c5c5a7da 100644
--- a/drivers/common/idpf/base/idpf_lan_vf_regs.h
+++ b/drivers/common/idpf/base/idpf_lan_vf_regs.h
@@ -90,11 +90,18 @@
 #define VF_INT_DYN_CTLN_WB_ON_ITR_M	BIT(VF_INT_DYN_CTLN_WB_ON_ITR_S)
 #define VF_INT_DYN_CTLN_INTENA_MSK_S	31
 #define VF_INT_DYN_CTLN_INTENA_MSK_M	BIT(VF_INT_DYN_CTLN_INTENA_MSK_S)
-#define VF_INT_ITR0(_i)			(0x00004C00 + ((_i) * 4))
-#define VF_INT_ITRN_V2(_i, _reg_start)	((_reg_start) + (((_i)) * 4))
-#define VF_INT_ITRN(_i, _INT)		(0x00002800 + ((_i) * 4) + ((_INT) * 0x40))
-#define VF_INT_ITRN_64(_i, _INT)	(0x00002C00 + ((_i) * 4) + ((_INT) * 0x100))
-#define VF_INT_ITRN_2K(_i, _INT)	(0x00072000 + ((_i) * 4) + ((_INT) * 0x100))
+/* _ITR is ITR index, _INT is interrupt index, _itrn_indx_spacing is spacing
+ * b/w itrn registers of the same vector
+ */
+#define VF_INT_ITR0(_ITR)		(0x00004C00 + ((_ITR) * 4))
+#define VF_INT_ITRN_ADDR(_ITR, _reg_start, _itrn_indx_spacing) \
+		 ((_reg_start) + (((_ITR)) * (_itrn_indx_spacing)))
+/* For VF with 16 vector support, itrn_reg_spacing is 0x4 and itrn_indx_spacing is 0x40 */
+#define VF_INT_ITRN(_INT, _ITR)	(0x00002800 + ((_INT) * 4) + ((_ITR) * 0x40))
+/* For VF with 64 vector support, itrn_reg_spacing is 0x4 and itrn_indx_spacing is 0x100 */
+#define VF_INT_ITRN_64(_INT, _ITR) (0x00002C00 + ((_INT) * 4) + ((_ITR) * 0x100))
+/* For VF with 2k vector support, itrn_reg_spacing is 0x4 and itrn_indx_spacing is 0x2000 */
+#define VF_INT_ITRN_2K(_INT, _ITR) (0x00072000 + ((_INT) * 4) + ((_ITR) * 0x2000))
 #define VF_INT_ITRN_MAX_INDEX		2
 #define VF_INT_ITRN_INTERVAL_S		0
 #define VF_INT_ITRN_INTERVAL_M		MAKEMASK(0xFFF, VF_INT_ITRN_INTERVAL_S)
-- 
2.25.1

[PATCH v3 09/15] common/idpf/base: fix idpf_send_msg_to_cp prototypes

[Wenjing Qiao]

Virtchnl2 opcodes are no longer in the enum virtchnl_ops. So change
these parameters to allow int rather that compiler enum type checking.

Fixes: fb4ac04e9bfa ("common/idpf: introduce common library")
Cc: stable@dpdk.org

Signed-off-by: Christopher Pau <christopher.pau@intel.com>
Signed-off-by: Wenjing Qiao <wenjing.qiao@intel.com>
---
 drivers/common/idpf/base/idpf_common.c    | 2 +-
 drivers/common/idpf/base/idpf_prototype.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/common/idpf/base/idpf_common.c b/drivers/common/idpf/base/idpf_common.c
index 41e0d05623..2394f85580 100644
--- a/drivers/common/idpf/base/idpf_common.c
+++ b/drivers/common/idpf/base/idpf_common.c
@@ -146,7 +146,7 @@ int idpf_init_hw(struct idpf_hw *hw, struct idpf_ctlq_size ctlq_size)
  * is sent asynchronously, i.e. idpf_asq_send_command() does not wait for
  * completion before returning.
  */
-int idpf_send_msg_to_cp(struct idpf_hw *hw, enum virtchnl_ops v_opcode,
+int idpf_send_msg_to_cp(struct idpf_hw *hw, int v_opcode,
 			int v_retval, u8 *msg, u16 msglen)
 {
 	struct idpf_ctlq_msg ctlq_msg = { 0 };
diff --git a/drivers/common/idpf/base/idpf_prototype.h b/drivers/common/idpf/base/idpf_prototype.h
index 3090f4cc2a..c9812a7f94 100644
--- a/drivers/common/idpf/base/idpf_prototype.h
+++ b/drivers/common/idpf/base/idpf_prototype.h
@@ -40,6 +40,6 @@ int idpf_set_rss_key(struct idpf_hw *hw, u16 seid,
 int idpf_set_mac_type(struct idpf_hw *hw);
 
 int idpf_reset(struct idpf_hw *hw);
-int idpf_send_msg_to_cp(struct idpf_hw *hw, enum virtchnl_ops v_opcode,
+int idpf_send_msg_to_cp(struct idpf_hw *hw, int v_opcode,
 			int v_retval, u8 *msg, u16 msglen);
 #endif /* _IDPF_PROTOTYPE_H_ */
-- 
2.25.1

[PATCH v3 10/15] common/idpf/base: fix memory leaks on ctrlq functions

[Wenjing Qiao]

idpf_init_hw needs to free it's q_info.
idpf_clean_arq_element needs to return buffers via post_rx_buffs

Fixes: fb4ac04e9bfa ("common/idpf: introduce common library")
Cc: stable@dpdk.org

Signed-off-by: Christopher Pau <christopher.pau@intel.com>
Signed-off-by: Wenjing Qiao <wenjing.qiao@intel.com>
---
 drivers/common/idpf/base/idpf_common.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/common/idpf/base/idpf_common.c b/drivers/common/idpf/base/idpf_common.c
index 2394f85580..da352ea88f 100644
--- a/drivers/common/idpf/base/idpf_common.c
+++ b/drivers/common/idpf/base/idpf_common.c
@@ -130,6 +130,8 @@ int idpf_init_hw(struct idpf_hw *hw, struct idpf_ctlq_size ctlq_size)
 	hw->mac.addr[4] = 0x03;
 	hw->mac.addr[5] = 0x14;
 
+	idpf_free(hw, q_info);
+
 	return 0;
 }
 
@@ -219,6 +221,7 @@ bool idpf_check_asq_alive(struct idpf_hw *hw)
 int idpf_clean_arq_element(struct idpf_hw *hw,
 			   struct idpf_arq_event_info *e, u16 *pending)
 {
+	struct idpf_dma_mem *dma_mem = NULL;
 	struct idpf_ctlq_msg msg = { 0 };
 	int status;
 	u16 msg_data_len;
@@ -226,6 +229,8 @@ int idpf_clean_arq_element(struct idpf_hw *hw,
 	*pending = 1;
 
 	status = idpf_ctlq_recv(hw->arq, pending, &msg);
+	if (status == -ENOMSG)
+		goto exit;
 
 	/* ctlq_msg does not align to ctlq_desc, so copy relevant data here */
 	e->desc.opcode = msg.opcode;
@@ -240,7 +245,14 @@ int idpf_clean_arq_element(struct idpf_hw *hw,
 		msg_data_len = msg.data_len;
 		idpf_memcpy(e->msg_buf, msg.ctx.indirect.payload->va, msg_data_len,
 			    IDPF_DMA_TO_NONDMA);
+		dma_mem = msg.ctx.indirect.payload;
+	} else {
+		*pending = 0;
 	}
+
+	status = idpf_ctlq_post_rx_buffs(hw, hw->arq, pending, &dma_mem);
+
+exit:
 	return status;
 }
 
-- 
2.25.1