From: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> To: Ruifeng Wang <Ruifeng.Wang@arm.com>, "Wei Hu (Xavier)" <xavier.huwei@huawei.com>, "Min Hu (Connor)" <humin29@huawei.com>, Yisen Zhuang <yisen.zhuang@huawei.com>, Lijun Ou <oulijun@huawei.com>, Huisong Li <lihuisong@huawei.com>, Chengchang Tang <tangchengchang@huawei.com>, Chengwen Feng <fengchengwen@huawei.com> Cc: "dev@dpdk.org" <dev@dpdk.org>, "vladimir.medvedkin@intel.com" <vladimir.medvedkin@intel.com>, "jerinj@marvell.com" <jerinj@marvell.com>, "hemant.agrawal@nxp.com" <hemant.agrawal@nxp.com>, nd <nd@arm.com>, Ruifeng Wang <Ruifeng.Wang@arm.com>, "stable@dpdk.org" <stable@dpdk.org>, Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>, nd <nd@arm.com> Subject: Re: [dpdk-stable] [PATCH v2 2/5] net/hns3: fix build with sve enabled Date: Sat, 9 Jan 2021 00:06:28 +0000 Message-ID: <DBAPR08MB5814BEC18EE51D44680482D398AD0@DBAPR08MB5814.eurprd08.prod.outlook.com> (raw) In-Reply-To: <20210108082523.1062058-3-ruifeng.wang@arm.com> <snip> > > Building with SVE extension enabled stopped with error: > > error: ACLE function ‘svwhilelt_b64_s32’ requires ISA extension ‘sve’ > 18 | #define PG64_256BIT svwhilelt_b64(0, 4) > > This is caused by unintentional cflags reset. > Fixed the issue by appending required flag to cflags instead of overriding it. > > Fixes: 952ebacce4f2 ("net/hns3: support SVE Rx") > Cc: xavier.huwei@huawei.com > Cc: stable@dpdk.org > > Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> > --- > drivers/net/hns3/meson.build | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build > index 45cee34d9..798086357 100644 > --- a/drivers/net/hns3/meson.build > +++ b/drivers/net/hns3/meson.build > @@ -32,7 +32,7 @@ deps += ['hash'] > if arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64') > sources += files('hns3_rxtx_vec.c') > if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' > - cflags = ['-DCC_SVE_SUPPORT'] > + cflags += ['-DCC_SVE_SUPPORT'] This comment is unrelated to this patch. We need to be consistent with the macro definitions. Is '__ARM_FEATURE_SVE' not enough? If we need to define an additional flag, I would name it something like 'RTE_ARM_FEATURE_SVE'. > sources += files('hns3_rxtx_vec_sve.c') > endif > endif > -- > 2.25.1
next prev parent reply other threads:[~2021-01-09 0:06 UTC|newest] Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <20201218101210.356836-1-ruifeng.wang@arm.com> [not found] ` <20210108082523.1062058-1-ruifeng.wang@arm.com> 2021-01-08 8:25 ` Ruifeng Wang 2021-01-09 0:06 ` Honnappa Nagarahalli [this message] 2021-01-09 2:11 ` oulijun 2021-01-11 2:39 ` Ruifeng Wang 2021-01-11 13:38 ` Honnappa Nagarahalli 2021-01-09 2:15 ` oulijun 2021-01-11 2:27 ` Ruifeng Wang 2021-01-08 8:25 ` [dpdk-stable] [PATCH v2 3/5] net/octeontx: " Ruifeng Wang 2021-01-08 8:25 ` [dpdk-stable] [PATCH v2 4/5] common/octeontx2: " Ruifeng Wang 2021-01-08 10:29 ` [dpdk-stable] [EXT] " Pavan Nikhilesh Bhagavatula 2021-01-11 9:51 ` Ruifeng Wang [not found] ` <20210112025709.1121523-1-ruifeng.wang@arm.com> 2021-01-12 2:57 ` [dpdk-stable] [PATCH v3 2/5] net/hns3: " Ruifeng Wang 2021-01-13 2:16 ` Honnappa Nagarahalli 2021-01-12 2:57 ` [dpdk-stable] [PATCH v3 3/5] net/octeontx: " Ruifeng Wang 2021-01-12 4:39 ` [dpdk-stable] [dpdk-dev] " Jerin Jacob 2021-01-12 2:57 ` [dpdk-stable] [PATCH v3 4/5] common/octeontx2: " Ruifeng Wang 2021-01-12 4:38 ` [dpdk-stable] [dpdk-dev] " Jerin Jacob
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