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From: "Zhang, Qi Z" <qi.z.zhang@intel.com>
To: "Guo, Junfeng" <junfeng.guo@intel.com>,
	"Wu, Jingjing" <jingjing.wu@intel.com>,
	"Xing, Beilei" <beilei.xing@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
	"Yigit, Ferruh" <ferruh.yigit@intel.com>,
	"stable@dpdk.org" <stable@dpdk.org>
Subject: Re: [dpdk-stable] [PATCH v3] net/iavf: fix QFI field bit check for GTPU EH
Date: Fri, 8 Oct 2021 06:09:37 +0000	[thread overview]
Message-ID: <d02758377c1042deaed2e142a605282b@intel.com> (raw)
In-Reply-To: <20211008104143.236289-1-junfeng.guo@intel.com>



> -----Original Message-----
> From: Guo, Junfeng <junfeng.guo@intel.com>
> Sent: Friday, October 8, 2021 6:42 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Wu, Jingjing <jingjing.wu@intel.com>;
> Xing, Beilei <beilei.xing@intel.com>
> Cc: dev@dpdk.org; Yigit, Ferruh <ferruh.yigit@intel.com>; Guo, Junfeng
> <junfeng.guo@intel.com>; stable@dpdk.org
> Subject: [PATCH v3] net/iavf: fix QFI field bit check for GTPU EH
> 
> If GTPU Extionsion header has no pdu_type setting, the parsed value of
> gtp_psc_spec->hdr.type will be 0, which is same as IAVF_GTPU_EH_DWLINK.
> Thus, for this case, we should check gtp_psc_mask->hdr.type instead, to set
> QFI field bit of GTPU_EH first.
> 
> Fixes: cd212c466992 ("net/iavf: fix QFI fields of GTPU UL/DL for flow director")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>

Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

Thanks
Qi


  reply	other threads:[~2021-10-08  6:09 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-29 11:13 [dpdk-stable] [PATCH] " Junfeng Guo
2021-09-29 12:31 ` [dpdk-stable] [PATCH v2] " Junfeng Guo
2021-10-07  4:24   ` Zhang, Qi Z
2021-10-08 10:41   ` [dpdk-stable] [PATCH v3] " Junfeng Guo
2021-10-08  6:09     ` Zhang, Qi Z [this message]
2021-10-08 11:01       ` David Marchand

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