Re: [dpdk-stable] [dpdk-dev] [PATCH v3] examples/l3fwd: fix unaligned memory access

["Burakov, Anatoly" <anatoly.burakov@intel.com>]

On 26-Jul-19 2:27 PM, hgovindh wrote:
> Fix unaligned memory access when reading IPv6 header which
> leads to segmentation fault by changing aligned memory read
> to unaligned memory read.
> 
> Bugzilla ID: 279
> Fixes: 64d3955de1de ("examples/l3fwd: fix ARM build")
> Cc: maciej.czekaj@caviumnetworks.com
> Cc: stable@dpdk.org
> Signed-off-by: hgovindh <hariprasad.govindharajan@intel.com>
> ---
> V2: Added functions which will do unaligned load based on the
> underlying architecture
> 
> V3: Removed functions added in V2 and replaced them with if macros
> which will branch based on the underlying architecture. As per my
> understanding since the unaligned load affects only Intel arch,
> I added that function branch and left the original code for other arc.
> Can someone with ARM and PowerPC arch, could you please validate this
> patch and let me know?
> ---
>   examples/l3fwd/l3fwd_em.c | 6 +++++-
>   1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
> index 5f499e005..ea9ca9491 100644
> --- a/examples/l3fwd/l3fwd_em.c
> +++ b/examples/l3fwd/l3fwd_em.c
> @@ -244,6 +244,7 @@ em_mask_key(void *key, xmm_t mask)
>   #error No vector engine (SSE, NEON, ALTIVEC) available, check your toolchain
>   #endif
>   
> +
>   static inline uint16_t

Unintended whitespace change?

-- 
Thanks,
Anatoly