From: checkpatch@dpdk.org
To: test-report@dpdk.org
Cc: Nithin Dabilpuram <ndabilpuram@marvell.com>
Subject: [dpdk-test-report] |WARNING| pw59691 [PATCH v2] net/octeontx2: add TSO offload support
Date: Wed, 25 Sep 2019 06:37:13 +0200 (CEST) [thread overview]
Message-ID: <20190925043713.03DE73977@dpdk.org> (raw)
In-Reply-To: <20190925043629.3721-1-ndabilpuram@marvell.com>
Test-Label: checkpatch
Test-Status: WARNING
http://dpdk.org/patch/59691
_coding style issues_
CHECK:CAMELCASE: Avoid CamelCase: <otx2_dev_is_95xx_Ax>
#290: FILE: drivers/net/octeontx2/otx2_ethdev.c:33:
+ if (otx2_dev_is_96xx_A0(dev) || otx2_dev_is_95xx_Ax(dev))
CHECK:MACRO_ARG_REUSE: Macro argument reuse 'flags' - possible side-effects?
#589: FILE: drivers/net/octeontx2/otx2_tx.c:948:
+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags) \
static uint16_t __rte_noinline __hot \
otx2_nix_xmit_pkts_ ## name(void *tx_queue, \
struct rte_mbuf **tx_pkts, uint16_t pkts) \
{ \
uint64_t cmd[sz]; \
\
+ /* For TSO inner checksum is a must */ \
+ if (((flags) & NIX_TX_OFFLOAD_TSO_F) && \
+ !((flags) & NIX_TX_OFFLOAD_L3_L4_CSUM_F)) \
+ return 0; \
return nix_xmit_pkts(tx_queue, tx_pkts, pkts, cmd, flags); \
}
CHECK:MACRO_ARG_REUSE: Macro argument reuse 'flags' - possible side-effects?
#607: FILE: drivers/net/octeontx2/otx2_tx.c:965:
+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags) \
static uint16_t __rte_noinline __hot \
otx2_nix_xmit_pkts_mseg_ ## name(void *tx_queue, \
struct rte_mbuf **tx_pkts, uint16_t pkts) \
{ \
uint64_t cmd[(sz) + NIX_TX_MSEG_SG_DWORDS - 2]; \
\
+ /* For TSO inner checksum is a must */ \
+ if (((flags) & NIX_TX_OFFLOAD_TSO_F) && \
+ !((flags) & NIX_TX_OFFLOAD_L3_L4_CSUM_F)) \
+ return 0; \
return nix_xmit_pkts_mseg(tx_queue, tx_pkts, pkts, cmd, \
(flags) | NIX_TX_MULTI_SEG_F); \
}
CHECK:MACRO_ARG_REUSE: Macro argument reuse 'flags' - possible side-effects?
#626: FILE: drivers/net/octeontx2/otx2_tx.c:983:
+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags) \
static uint16_t __rte_noinline __hot \
otx2_nix_xmit_pkts_vec_ ## name(void *tx_queue, \
struct rte_mbuf **tx_pkts, uint16_t pkts) \
{ \
+ /* VLAN, TSTMP, TSO is not supported by vec */ \
if ((flags) & NIX_TX_OFFLOAD_VLAN_QINQ_F || \
+ (flags) & NIX_TX_OFFLOAD_TSTAMP_F || \
+ (flags) & NIX_TX_OFFLOAD_TSO_F) \
return 0; \
return nix_xmit_pkts_vector(tx_queue, tx_pkts, pkts, (flags)); \
}
ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#914: FILE: drivers/net/octeontx2/otx2_tx.h:475:
+#define NIX_TX_FASTPATH_MODES \
+T(no_offload, 0, 0, 0, 0, 0, 0, 4, \
+ NIX_TX_OFFLOAD_NONE) \
+T(l3l4csum, 0, 0, 0, 0, 0, 1, 4, \
+ L3L4CSUM_F) \
+T(ol3ol4csum, 0, 0, 0, 0, 1, 0, 4, \
+ OL3OL4CSUM_F) \
+T(ol3ol4csum_l3l4csum, 0, 0, 0, 0, 1, 1, 4, \
+ OL3OL4CSUM_F | L3L4CSUM_F) \
+T(vlan, 0, 0, 0, 1, 0, 0, 6, \
+ VLAN_F) \
+T(vlan_l3l4csum, 0, 0, 0, 1, 0, 1, 6, \
+ VLAN_F | L3L4CSUM_F) \
+T(vlan_ol3ol4csum, 0, 0, 0, 1, 1, 0, 6, \
+ VLAN_F | OL3OL4CSUM_F) \
+T(vlan_ol3ol4csum_l3l4csum, 0, 0, 0, 1, 1, 1, 6, \
+ VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(noff, 0, 0, 1, 0, 0, 0, 4, \
+ NOFF_F) \
+T(noff_l3l4csum, 0, 0, 1, 0, 0, 1, 4, \
+ NOFF_F | L3L4CSUM_F) \
+T(noff_ol3ol4csum, 0, 0, 1, 0, 1, 0, 4, \
+ NOFF_F | OL3OL4CSUM_F) \
+T(noff_ol3ol4csum_l3l4csum, 0, 0, 1, 0, 1, 1, 4, \
+ NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(noff_vlan, 0, 0, 1, 1, 0, 0, 6, \
+ NOFF_F | VLAN_F) \
+T(noff_vlan_l3l4csum, 0, 0, 1, 1, 0, 1, 6, \
+ NOFF_F | VLAN_F | L3L4CSUM_F) \
+T(noff_vlan_ol3ol4csum, 0, 0, 1, 1, 1, 0, 6, \
+ NOFF_F | VLAN_F | OL3OL4CSUM_F) \
+T(noff_vlan_ol3ol4csum_l3l4csum, 0, 0, 1, 1, 1, 1, 6, \
+ NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(ts, 0, 1, 0, 0, 0, 0, 8, \
+ TSP_F) \
+T(ts_l3l4csum, 0, 1, 0, 0, 0, 1, 8, \
+ TSP_F | L3L4CSUM_F) \
+T(ts_ol3ol4csum, 0, 1, 0, 0, 1, 0, 8, \
+ TSP_F | OL3OL4CSUM_F) \
+T(ts_ol3ol4csum_l3l4csum, 0, 1, 0, 0, 1, 1, 8, \
+ TSP_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(ts_vlan, 0, 1, 0, 1, 0, 0, 8, \
+ TSP_F | VLAN_F) \
+T(ts_vlan_l3l4csum, 0, 1, 0, 1, 0, 1, 8, \
+ TSP_F | VLAN_F | L3L4CSUM_F) \
+T(ts_vlan_ol3ol4csum, 0, 1, 0, 1, 1, 0, 8, \
+ TSP_F | VLAN_F | OL3OL4CSUM_F) \
+T(ts_vlan_ol3ol4csum_l3l4csum, 0, 1, 0, 1, 1, 1, 8, \
+ TSP_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(ts_noff, 0, 1, 1, 0, 0, 0, 8, \
+ TSP_F | NOFF_F) \
+T(ts_noff_l3l4csum, 0, 1, 1, 0, 0, 1, 8, \
+ TSP_F | NOFF_F | L3L4CSUM_F) \
+T(ts_noff_ol3ol4csum, 0, 1, 1, 0, 1, 0, 8, \
+ TSP_F | NOFF_F | OL3OL4CSUM_F) \
+T(ts_noff_ol3ol4csum_l3l4csum, 0, 1, 1, 0, 1, 1, 8, \
+ TSP_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(ts_noff_vlan, 0, 1, 1, 1, 0, 0, 8, \
+ TSP_F | NOFF_F | VLAN_F) \
+T(ts_noff_vlan_l3l4csum, 0, 1, 1, 1, 0, 1, 8, \
+ TSP_F | NOFF_F | VLAN_F | L3L4CSUM_F) \
+T(ts_noff_vlan_ol3ol4csum, 0, 1, 1, 1, 1, 0, 8, \
+ TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F) \
+T(ts_noff_vlan_ol3ol4csum_l3l4csum, 0, 1, 1, 1, 1, 1, 8, \
+ TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+ \
+T(tso, 1, 0, 0, 0, 0, 0, 6, \
+ TSO_F) \
+T(tso_l3l4csum, 1, 0, 0, 0, 0, 1, 6, \
+ TSO_F | L3L4CSUM_F) \
+T(tso_ol3ol4csum, 1, 0, 0, 0, 1, 0, 6, \
+ TSO_F | OL3OL4CSUM_F) \
+T(tso_ol3ol4csum_l3l4csum, 1, 0, 0, 0, 1, 1, 6, \
+ TSO_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(tso_vlan, 1, 0, 0, 1, 0, 0, 6, \
+ TSO_F | VLAN_F) \
+T(tso_vlan_l3l4csum, 1, 0, 0, 1, 0, 1, 6, \
+ TSO_F | VLAN_F | L3L4CSUM_F) \
+T(tso_vlan_ol3ol4csum, 1, 0, 0, 1, 1, 0, 6, \
+ TSO_F | VLAN_F | OL3OL4CSUM_F) \
+T(tso_vlan_ol3ol4csum_l3l4csum, 1, 0, 0, 1, 1, 1, 6, \
+ TSO_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(tso_noff, 1, 0, 1, 0, 0, 0, 6, \
+ TSO_F | NOFF_F) \
+T(tso_noff_l3l4csum, 1, 0, 1, 0, 0, 1, 6, \
+ TSO_F | NOFF_F | L3L4CSUM_F) \
+T(tso_noff_ol3ol4csum, 1, 0, 1, 0, 1, 0, 6, \
+ TSO_F | NOFF_F | OL3OL4CSUM_F) \
+T(tso_noff_ol3ol4csum_l3l4csum, 1, 0, 1, 0, 1, 1, 6, \
+ TSO_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(tso_noff_vlan, 1, 0, 1, 1, 0, 0, 6, \
+ TSO_F | NOFF_F | VLAN_F) \
+T(tso_noff_vlan_l3l4csum, 1, 0, 1, 1, 0, 1, 6, \
+ TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F) \
+T(tso_noff_vlan_ol3ol4csum, 1, 0, 1, 1, 1, 0, 6, \
+ TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F) \
+T(tso_noff_vlan_ol3ol4csum_l3l4csum, 1, 0, 1, 1, 1, 1, 6, \
+ TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(tso_ts, 1, 1, 0, 0, 0, 0, 8, \
+ TSO_F | TSP_F) \
+T(tso_ts_l3l4csum, 1, 1, 0, 0, 0, 1, 8, \
+ TSO_F | TSP_F | L3L4CSUM_F) \
+T(tso_ts_ol3ol4csum, 1, 1, 0, 0, 1, 0, 8, \
+ TSO_F | TSP_F | OL3OL4CSUM_F) \
+T(tso_ts_ol3ol4csum_l3l4csum, 1, 1, 0, 0, 1, 1, 8, \
+ TSO_F | TSP_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(tso_ts_vlan, 1, 1, 0, 1, 0, 0, 8, \
+ TSO_F | TSP_F | VLAN_F) \
+T(tso_ts_vlan_l3l4csum, 1, 1, 0, 1, 0, 1, 8, \
+ TSO_F | TSP_F | VLAN_F | L3L4CSUM_F) \
+T(tso_ts_vlan_ol3ol4csum, 1, 1, 0, 1, 1, 0, 8, \
+ TSO_F | TSP_F | VLAN_F | OL3OL4CSUM_F) \
+T(tso_ts_vlan_ol3ol4csum_l3l4csum, 1, 1, 0, 1, 1, 1, 8, \
+ TSO_F | TSP_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(tso_ts_noff, 1, 1, 1, 0, 0, 0, 8, \
+ TSO_F | TSP_F | NOFF_F) \
+T(tso_ts_noff_l3l4csum, 1, 1, 1, 0, 0, 1, 8, \
+ TSO_F | TSP_F | NOFF_F | L3L4CSUM_F) \
+T(tso_ts_noff_ol3ol4csum, 1, 1, 1, 0, 1, 0, 8, \
+ TSO_F | TSP_F | NOFF_F | OL3OL4CSUM_F) \
+T(tso_ts_noff_ol3ol4csum_l3l4csum, 1, 1, 1, 0, 1, 1, 8, \
+ TSO_F | TSP_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F) \
+T(tso_ts_noff_vlan, 1, 1, 1, 1, 0, 0, 8, \
+ TSO_F | TSP_F | NOFF_F | VLAN_F) \
+T(tso_ts_noff_vlan_l3l4csum, 1, 1, 1, 1, 0, 1, 8, \
+ TSO_F | TSP_F | NOFF_F | VLAN_F | L3L4CSUM_F) \
+T(tso_ts_noff_vlan_ol3ol4csum, 1, 1, 1, 1, 1, 0, 8, \
+ TSO_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F) \
+T(tso_ts_noff_vlan_ol3ol4csum_l3l4csum, 1, 1, 1, 1, 1, 1, 8, \
+ TSO_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)
total: 1 errors, 0 warnings, 4 checks, 909 lines checked
parent reply other threads:[~2019-09-25 4:37 UTC|newest]
Thread overview: expand[flat|nested] mbox.gz Atom feed
[parent not found: <20190925043629.3721-1-ndabilpuram@marvell.com>]
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